Commit graph

1248 commits

Author SHA1 Message Date
Manish V Badarkhe
dea307fd6c refactor(fvp): remove RSS usage
Removed RSS usage from the Base AEM FVP platform, as it wasn't
functional on this platform. The Base AEM FVP platform lacks
support for RSS.
Instead, the TC2 platform with RSS is available for actual RSS
interface implementation and testing.

Change-Id: I8f68157319399ab526f9e851b26dba903db5c2e7
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-11-14 09:52:11 +02:00
Sandrine Bailleux
b65dfe40ae chore(auth)!: remove CryptoCell-712/713 support
CryptoCell-712 and CryptoCell-713 drivers have been deprecated since
TF-A v2.9 and their removal was announced for TF-A v2.10 release.
See [1].

As the release is approaching, this patch deletes these drivers' code as
well as all references to them in the documentation and Arm platforms
code (Nuvoton platform is taken care in a subsequent patch). Associated
build options (ARM_CRYPTOCELL_INTEG and PLAT_CRYPTOCELL_BASE) have also
been removed and thus will have no effect if defined.

This is a breaking change for downstream platforms which use these
drivers.

[1] https://trustedfirmware-a.readthedocs.io/en/v2.9/about/release-information.html#removal-of-deprecated-drivers
    Note that TF-A v3.0 release later got renumbered into v2.10.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Idabbc9115f6732ac1a0e52b273d3380677a39813
2023-11-08 10:42:33 +02:00
Werner Lewis
f4e64d1f5e feat(morello): add TF-A version string to NT_FW_CONFIG
TF-A version string is passed into NT_FW_CONFIG to allow access in
UEFI.

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I9da7b93d30c9d9230ea9a2cd2730cde897ffc580
2023-11-03 09:30:52 +00:00
Werner Lewis
10fd85d8f4 feat(morello): set NT_FW_CONFIG properties for MCC, PCC and SCP version
SDS firmware version structure is added with MCC, PCC and SCP firmware
version members. These are set in NT_FW_CONFIG to provide access to
firmware version information in UEFI.

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: Ib0c476e54ef428fb7904f0de5c6f4df6a5fbd7db
2023-11-03 09:30:52 +00:00
Manish Pandey
6f802c44e9 Merge changes from topic "mp/exceptions" into integration
* changes:
  docs(ras): update RAS documentation
  docs(el3-runtime): update BL31 exception vector handling
  fix(el3-runtime): restrict lower el EA handlers in FFH mode
  fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT
  fix(ras): restrict ENABLE_FEAT_RAS to have only two states
  feat(ras): use FEAT_IESB for error synchronization
  feat(el3-runtime): modify vector entry paths
2023-11-02 14:34:53 +01:00
Manish Pandey
f87e54f73c fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT
This patch removes RAS_FFH_SUPPORT macro which is the combination of
ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an
internal macro FFH_SUPPORT which gets enabled when platforms wants
to enable lower EL EA handling at EL3. The internal macro FFH_SUPPORT
will be automatically enabled if HANDLE_EA_EL3_FIRST_NS is enabled.
FFH_SUPPORT along with ENABLE_FEAT_RAS will be used in source files
to provide equivalent check which was provided by RAS_FFH_SUPPORT
earlier. In generic code we needed a macro which could abstract both
HANDLE_EA_EL3_FIRST_NS and RAS_FFH_SUPPORT macros that had limitations.
Former was tied up with NS world only while the latter was tied to RAS
feature.

This is to allow Secure/Realm world to have their own FFH macros
in future.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ie5692ccbf462f5dcc3f005a5beea5aa35124ac73
2023-11-01 17:45:56 +00:00
Manish V Badarkhe
e712f92408 Merge changes from topic "hst/cs1k-add-gpt-support" into integration
* changes:
  feat(bl2): add gpt support
  fix(corstone-1000): modify boot device dependencies
  fix(corstone-1000): removing the signature area
2023-11-01 12:18:09 +01:00
Manish Pandey
970a4a8d8c fix(ras): restrict ENABLE_FEAT_RAS to have only two states
As part of migrating RAS extension to feature detection mechanism, the
macro ENABLE_FEAT_RAS was allowed to have dynamic detection (FEAT_STATE
2). Considering this feature does impact execution of EL3 and we need
to know at compile time about the presence of this feature. Do not use
dynamic detection part of feature detection mechanism.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I23858f641f81fbd81b6b17504eb4a2cc65c1a752
2023-11-01 11:11:38 +00:00
Harsimran Singh Tungal
3ff5fc2b35 fix(corstone-1000): modify boot device dependencies
Modify boot device dependencies and remove the one's
which are not needed.

Change-Id: I71cd60558ab4bb5162afefad4f00d631c2308e72
Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
2023-10-31 23:00:31 +01:00
Manish Pandey
e8d60a31ad Merge changes from topic "hm/mpam" into integration
* changes:
  fix(build): convert tabs and ifdef comparisons
  fix(build): disable ENABLE_FEAT_MPAM for Aarch32
2023-10-31 20:47:19 +01:00
Manish V Badarkhe
6cc9495822 Merge "refactor(fvp): do not use RSS platform token and attestation key APIs" into integration 2023-10-31 17:25:07 +01:00
Harrison Mutai
a07b4590dd fix(build): disable ENABLE_FEAT_MPAM for Aarch32
Disable FEAT_MPAM support for Aarch32 as it is not supported, following
[1]. ENABLE_FEAT_MPAM is set to 2 by default for Aarch64 in
arch_features.mk, eliminating the need for duplication in the platform
makefile.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/23710

Change-Id: I1c8b6844254e00e6372900f1c87f995f292ae65c
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-10-31 14:57:34 +00:00
Harsimran Singh Tungal
5856a91a64 fix(corstone-1000): removing the signature area
The TF-M on the secure enclave side takes care of boot bank selection for our platform. The TF-A doesn't require to manage the boot bank, so,
removing the boot bank selection. TF-A doesn't expect the signature area so removed it from FIP partition

Change-Id: I298dd51fa068534c299c66b0e4c353819ea12a26
Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
2023-10-31 16:40:35 +02:00
Manish Pandey
fd7e32b810 Merge changes from topic "hm/post-image" into integration
* changes:
  refactor(fvp): move image handling into generic procedure
  refactor(bl2): make post image handling platform-specific
2023-10-31 12:59:37 +01:00
Manish Pandey
11336fb44d Merge changes from topic "gr/build_refactor" into integration
* changes:
  build(refactor): avoid ifdef comparison
  refactor(build): avoid using values for comparison
  refactor(build): reorder arch features handling
  build(n1sdp): add ARM_ARCH_MAJOR.ARM_ARCH_MINOR
  refactor(build): reorder platform Makefile evaluation
2023-10-30 17:26:04 +01:00
Govindraj Raja
d638029ffc refactor(build): avoid using values for comparison
With changes to refactor to use first platform makefiles
then parse arch_features.mk file 'ENABLE_RME' will be initialised
only when we define during build or at arch_features.mk thus
making comparison of 'ENABLE_RME' to '0' incorrect.

So keep BRBE disabled when RME is enabled at main makefile level.

Change-Id: I7e3d99eb444678d63585bd5971ada627cfc4fcc9
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2023-10-30 10:34:44 -05:00
Govindraj Raja
cf953bca5c build(n1sdp): add ARM_ARCH_MAJOR.ARM_ARCH_MINOR
n1sdp based out of Arm Neoverse N1 Core uses Arm®v8.2‑A extensions
so set ARM_ARCH_MAJOR.ARM_ARCH_MINOR for n1sdp platform to 8.2

Change-Id: Ib70c6be5e12817961430870d50fb1b0efca32df2
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2023-10-30 10:34:44 -05:00
Lauren Wehrmeister
48b92c604f Merge changes from topic "mb/psa-crypto-ecdsa" into integration
* changes:
  docs: mark PSA_CRYPTO as an experimental feature
  feat(fvp): increase BL1 RW area for PSA_CRYPTO implementation
  feat(mbedtls-psa): mbedTLS PSA Crypto with ECDSA
2023-10-30 16:20:24 +01:00
Harrison Mutai
568d406ce7 refactor(fvp): move image handling into generic procedure
Post image handling of the HW_CONFIG is out-of-scope for
`plat_get_next_bl_params`. Move parts of the code responsible for post
processing of loaded images into `bl2_plat_handle_post_image_load` for code
reusability and maintainability.

Change-Id: I476b3d306ebcd4529f5e542ba1063e144920bb5f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-10-30 10:36:39 +00:00
Harrison Mutai
ed5672070d refactor(bl2): make post image handling platform-specific
In certain instances a platform may need to make modifications to an
image after it has been loaded by BL2. The existing common
implementation is a thin wrapper for a more generic arm post image
handler. To enable platforms to make changes to images when
they're loaded, move this into platform code.

Change-Id: I44025391056adb2d8a8eb4ea5984257b02027181
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-10-30 10:29:03 +00:00
Madhukar Pappireddy
efd812c3ee Merge "feat(cpus): add support for Travis CPU" into integration 2023-10-27 15:49:40 +02:00
Harrison Mutai
94c90ac816 feat(handoff): port BL31-BL33 interface to fw handoff framework
The firmware handoff framework is a light weight mechanism for sharing
information between bootloader stages. Add support for this framework at
the handoff boundary between runtime firmware BL31 and NS software on FVP.

Change-Id: Ib02e0e4c20a39e32e06da667caf2ce5a28de1e28
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-10-27 10:49:46 +01:00
Manish V Badarkhe
eb8700a938 refactor(fvp): do not use RSS platform token and attestation key APIs
Since FVP does not support RSS, RSS APIs used to provide the hardcoded
platform token and attestation key. However, that seems to be causing
un-necessary mandating of some PSA crypto definitions, that doesn't
seem appropriate.
Hence to retrieve platform token and realm attestation key, these
RSS APIs calls have been replaced with hardcoded information.

Change-Id: I5fd091025e3444a698b9d387763ce20db6b13ae1
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-10-26 21:01:00 +02:00
Juan Pablo Conde
a0594add2e feat(cpus): add support for Travis CPU
Adding basic CPU library code to support Travis CPU

Change-Id: I3c85e9fab409325d213978888a8f6d6949291258
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
2023-10-26 11:25:28 -05:00
Manish V Badarkhe
ce189383dc feat(fvp): increase BL1 RW area for PSA_CRYPTO implementation
When using PSA Crypto API, few algorithms like ECDSA require a
larger BL1 RW area. Hence added an additional BL1 RW page when
PSA_CRYPTO is selected.

Change-Id: Id6994667641a0b1e36b6a356d7c39a125d62ac01
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-10-26 08:53:20 +01:00
Manish Pandey
0e1dc0f2bc Merge "fix(mpam): refine MPAM initialization and enablement process" into integration 2023-10-25 19:14:06 +02:00
Arvind Ram Prakash
edebefbcbc fix(mpam): refine MPAM initialization and enablement process
Restricts MPAM to only NS world and enables trap to EL3 for access of
MPAM registers from lower ELs of Secure and Realm world.

This patch removes MPAM enablement from global context and adds it to
EL3 State context which enables/disables MPAM during world switches.
Renamed ENABLE_MPAM_FOR_LOWER_ELS to ENABLE_FEAT_MPAM and
removed mpam_init_el3() as RESET behaviour is trapping.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I131f9dba5df236a71959b2d425ee11af7f3c38c4
2023-10-25 09:04:29 -05:00
Govindraj Raja
1ca73b4f4a fix(build): convert tabs to spaces
Convert any used tabs in arch_features.mk to spaces to avoid makefile
build issues. Only recipes should be indented with tabs.

ENABLE_TRBE_FOR_NS should be enabled only for aarch64 but accidentally
its enabled for aarch32 as well in FVP makefile.

Change-Id: Iee913a04d6b60a4738183a17421754c2638e8e6d
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2023-10-23 08:12:30 -05:00
Madhukar Pappireddy
20324013b1 feat(fvp): new SiP call to set an interrupt pending
This patch introduces an SiP SMC call for FVP platform to set an
interrupt pending. This is needed for testing purposes.

Change-Id: I3dc68ffbec36d90207c30571dc1fa7ebfb75046e
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2023-10-19 22:42:45 -05:00
laurenw-arm
c623fb2dad refactor(arm): remove ARM_ROTPK_KEY_LEN comparison
Removing ARM_ROTPK_KEY_LEN definition and comparison in full key .S
files since there is little value in comparing the defined value with a
static size. This becomes more maintenance than value addition.

Removing defines no longer required and general clean up of .S full key
files.

Change-Id: Id286b7078ab9e190e37a43804e2a8d1b0934c235
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
2023-10-16 10:02:13 -05:00
laurenw-arm
b8ae68908d feat(arm): ecdsa p384/p256 full key support
Add full key support for ECDSA P384 and P256.

New .S files and p384 pem file created along with new
plat_get_rotpk_info() flag ARM_ROTPK_DEVEL_FULL_DEV_ECDSA_KEY_ID.

Change-Id: I578b257eca41070bb4f4791ef429f2b8a66b1eb3
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
2023-10-13 09:59:25 -05:00
Nishant Sharma
c47d0491ed feat(rdn2): introduce platform handler for Group0 interrupt
This patch introduces a handler for RDN2 platform to triage Group0
secure interrupts. Currently, it is empty but serves as a
placeholder for future Group0 interrupt sources.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: If0b64e507e9105813d9a5d16f70101cf0d8ca5a4
2023-10-12 11:41:51 +01:00
Nishant Sharma
f99dcbace7 feat(rdn2): add plat hook for memory transaction
RdN2 does not make MEM_SHARE/LEND requests. Instead, add a dummy
implementation of memory management related platform hooks.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: Ifce55b6661f03d379e2fd2dc5625200d550d8038
2023-10-12 11:41:31 +01:00
Nishant Sharma
f458934265 feat(rdn2): introduce accessor function to obtain datastore
In order to provide the EL3 SPMC a sufficient datastore to
record memory descriptor, introduce an accessor function
so that the backing memory can be allocated in a platform
defined manner to accommodate memory constraints and
desired usecases.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: If5842e79c2ad22ccc17362b114f47d9900d82f7e
2023-10-12 11:40:54 +01:00
Nishant Sharma
b4bed4b769 feat(rdn2): add defines needed for spmc-el3
Add the following platform specific flags to enable SPMC build.

SECURE_PARTITION_COUNT: Number of secure partitions supported
NS_PARTITION_COUNT: Number of non secure partitions supported
MAX_EL3_LP_DESCS_COUNT: Number of logical partitions supported

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: I33d46be9dffd0acfc088bc1701dc0b1ed92dbf46
2023-10-12 10:47:18 +01:00
Soby Mathew
920aa8d4d2 Merge "feat(rmmd): enable SME for RMM" into integration 2023-10-03 14:29:17 +02:00
Arunachalam Ganapathy
f92eb7e261 feat(rmmd): enable SME for RMM
This patch enables Scalable Matrix Extension (SME) for RMM. RMM will
save/restore required registers that are shared with SVE/FPU register
state so that Realm can use FPU or SVE.

The Relevant RMM support can be found here :
https://github.com/TF-RMM/tf-rmm/commit/0ccd7ae58b00

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I3bbdb840e7736dec00b71c85fcec3d5719413ffd
2023-10-02 16:55:36 +01:00
Manish Pandey
ee7d7f66a7 Merge "fix(spmd): coverity scan issues" into integration 2023-09-27 16:29:48 +02:00
Yann Gautier
1b2667bf66 Merge "fix(corstone-1000): add cpu_helpers.S to platform.mk" into integration 2023-09-26 11:32:11 +02:00
Raghu Krishnamurthy
b04343f3c9 fix(spmd): coverity scan issues
Coverity defects fixed by this patch are:
*** CID 400208:  Performance inefficiencies  (PASS_BY_VALUE)
/include/services/el3_spmd_logical_sp.h: 108 in
ffa_partition_info_regs_get_last_idx()

*** CID 400207:  Performance inefficiencies  (PASS_BY_VALUE)
/services/std_svc/spmd/spmd_logical_sp.c: 359 in
ffa_partition_info_regs_get_part_info()

Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>
Change-Id: I9597377a8ec3d5519995e1619d99ee7102f33939
2023-09-25 13:06:13 -07:00
Joanna Farley
455cd0d3b5 Merge "chore: remove MULTI_CONSOLE_API references" into integration 2023-09-19 14:48:43 +02:00
Olivier Deprez
4bb6bd1e5b Merge "fix(plat/arm): do not program DSU CLUSTERPWRDN register" into integration 2023-09-14 18:10:29 +02:00
Manish Pandey
3209b35d2a fix(plat/arm): do not program DSU CLUSTERPWRDN register
This reverts commit 9cf7f355ce.

Above mentioned commit was writing to cluster power required bit of
CLUSTERPWRDN register, which provides an advisory status to the power
controller.
Bit definition indication:
0 : Cluster power is not required when all cores are powered down
1 : Cluster power is required even when all cores are powered down
RESET value of this bit is 0

The current implementation in TF-A just programs this bit to 0 when
cluster power down is done but it never sets it to 1. Which actully
does not change any behaviour as the value of this bit always remains 0.

Ideally this bit has to be set to 1 when a core powers up (as RESET
value is 0) and set it to 0 for any core power down except if its last
man standing, in that case we need to ensure the target power level
from OS is cluster then we can do set it to 0.
There also are some investigation needs to be done to find that whether
we need a explicit message to power controller for turning cluster OFF
or it will happen automatically.

Considering this needs a bit of analysis as well as a platform to test
it on, revert the changes which impact the programming during cluster
power down and just keep register defnition.

Change-Id: I4c4ebedae7ca9cd081fb1e0605b9d906d77614d9
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
2023-09-14 11:42:14 +01:00
Manish V Badarkhe
03cf4e9aad fix(fvp): conditionally increase XLAT and MMAP table entries
The XLAT and MMAP table entries are increased as a part of this
patch: 12fe591 , but this is causing failures for some builds,
so conditionally increased the XLAT and MMAP table entries

Change-Id: I31e8c811bebc767d7187e045a35c9db0eef13ae0
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-09-13 15:02:18 +01:00
Gauri Sahnan
cb27274c99 fix(corstone-1000): add cpu_helpers.S to platform.mk
Add Platform related dependency in Makefile

Reviewed-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Signed-off-by: Gauri Sahnan <Gauri.Sahnan@arm.com>
Change-Id: Idecb84233d3e0c386bf0b7f6d57cbebd38875f28
2023-09-13 13:33:47 +01:00
Manish Pandey
55e37408d5 Merge "refactor(arm): avoid setting HASH_PREREQUISITES for a build without ROT_KEY" into integration 2023-09-12 16:32:49 +02:00
Michal Simek
13ff6e9dde chore: remove MULTI_CONSOLE_API references
MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c
("Remove MULTI_CONSOLE_API flag and references to it") that's why remove
references in platform.mk files and also in one rst which is not valid
anymore.

Change-Id: I45f8e7db0a14ce63de62509100d8159b7aca2657
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-12 15:28:36 +02:00
Manish V Badarkhe
f1dfaa42cf fix(fvp): increase the maximum size of Event Log
To make room for all image measurements using the
RME+SPM+TBB+MEASURED_BOOT test configuration, the Event Log's maximum
size has been significantly increased.

Change-Id: I0b9948dab893e14677bca0afa07167648a6c2729
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-09-07 15:55:59 +01:00
Manish V Badarkhe
12fe591b3e fix(fvp): increase maximum MMAP and XLAT entries count
Maximum entries for MMAP and XLAT have been increased in order to
support the configuration SPM+RME, along with MEASURED_BOOT and
TRUSTED_BOARD_BOOT.

Change-Id: Ic0a0aefecb49d7ccc71357c4bd94e7bd2e5f57c4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-09-07 11:42:09 +01:00
Manish V Badarkhe
eb46520c5c Merge "feat(morello): add cpuidle support" into integration 2023-09-06 12:47:46 +02:00