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feat(rmmd): enable SME for RMM

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This patch enables Scalable Matrix Extension (SME) for RMM. RMM will
save/restore required registers that are shared with SVE/FPU register
state so that Realm can use FPU or SVE.

The Relevant RMM support can be found here :
https://github.com/TF-RMM/tf-rmm/commit/0ccd7ae58b00

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I3bbdb840e7736dec00b71c85fcec3d5719413ffd
This commit is contained in:
Arunachalam Ganapathy 2023-05-18 10:57:29 +01:00 • committed by Soby Mathew
parent cc933e1d12
commit f92eb7e261
4 changed files with 14 additions and 12 deletions
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7
Makefile
View file

@ -980,13 +980,6 @@ ifeq (${ARCH},aarch32)
endif
endif #(ARCH=aarch32)
# Ensure ENABLE_RME is not used with SME
ifeq (${ENABLE_RME},1)
ifneq (${ENABLE_SME_FOR_NS},0)
$(error "ENABLE_SME_FOR_NS cannot be used with ENABLE_RME")
endif
endif
ifneq (${ENABLE_SME_FOR_NS},0)
ifeq (${ENABLE_SVE_FOR_NS},0)
$(error "ENABLE_SME_FOR_NS requires ENABLE_SVE_FOR_NS")

6
docs/getting_started/build-options.rst
View file

@ -452,9 +452,9 @@ Common build options
world to trap to EL3. Requires ``ENABLE_SVE_FOR_NS`` to be set as SME is a
superset of SVE. SME is an optional architectural feature for AArch64
and TF-A support is experimental. At this time, this build option cannot be
used on systems that have SPD=spmd/SPM_MM or ENABLE_RME, and attempting to
build with these options will fail. This flag can take the values 0 to 2, to
align with the ``FEATURE_DETECTION`` mechanism. Default is 0.
used on systems that have SPD=spmd/SPM_MM and atempting to build with this
option will fail. This flag can take the values 0 to 2, to align with the
``FEATURE_DETECTION`` mechanism. Default is 0.
- ``ENABLE_SME2_FOR_NS``: Numeric value to enable Scalable Matrix Extension
version 2 (SME2) for the non-secure world only. SME2 is an optional

2
plat/arm/board/fvp/platform.mk
View file

@ -58,7 +58,6 @@ ifneq (${SPD}, tspd)
ifeq (${ARCH}, aarch64)
ifneq (${SPD}, spmd)
ifeq (${SPM_MM}, 0)
ifeq (${ENABLE_RME}, 0)
ifeq (${CTX_INCLUDE_FPREGS}, 0)
ENABLE_SME_FOR_NS := 2
ENABLE_SME2_FOR_NS := 2
@ -67,7 +66,6 @@ endif
endif
endif
endif
endif
# enable unconditionally for all builds
ifeq (${ARCH}, aarch64)

11
services/std_svc/rmmd/rmmd_main.c
View file

@ -30,6 +30,7 @@
#include <platform_def.h>
#include <services/rmmd_svc.h>
#include <smccc_helpers.h>
#include <lib/extensions/sme.h>
#include <lib/extensions/sve.h>
#include "rmmd_initial_context.h"
#include "rmmd_private.h"
@ -134,6 +135,16 @@ static void manage_extensions_realm(cpu_context_t *ctx)
}
pmuv3_enable(ctx);
/*
* If SME/SME2 is supported and enabled for NS world, then enables SME
* for Realm world. RMM will save/restore required registers that are
* shared with SVE/FPU so that Realm can use FPU or SVE.
*/
if (is_feat_sme_supported()) {
/* sme_enable() also enables SME2 if supported by hardware */
sme_enable(ctx);
}
}
/*******************************************************************************