Commit graph

10 commits

Author SHA1 Message Date
Yann Gautier
fc2e4bab15 fix(stm32mp15-fdts): correct MCO2_PLL4 clock name for DHCOM
This clock name was renamed from MCO2_PLL4P to MCO2_PLL4 with the RCC
binding update commit [1]. This file was missed in that update, and the
board fails to compile.

[1]: 52b253bfa2 feat(dt-bindings): new RCC DT bindings

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I215abff1fc275ac1ef6dfb2ac86b9223e6990064
2024-11-20 09:37:15 +01:00
Gabriel Fernandez
66d7c8bf8e feat(stm32mp1-fdts): remove PLL1 settings
TF-A BL2 always boot at 650MHz using an algorithm to calculate PLL1
settings, without reading DT. Remove the corresponding nodes.

Change-Id: I0003337d8d37df7b2a70a84b5475f4278c4c4669
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
2024-06-11 14:02:10 +02:00
Gabriel Fernandez
4391e5edea feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
RCC bindings alignment with MP13 RCC bindings

Change-Id: I02c89accd51e4214cd009d4a9433d8d9b6aeba25
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
2024-06-11 14:02:10 +02:00
Lionel Debieve
d594239d4e feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
LSI was too slow to provide enough random numbers (limited
to 6ms for 16 bytes production). Switch to CSI that allow
to get the RNG fifo ready in less than 50µs.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I76d1fe58e2f4d5416a96f48123ae36bd82d8a8ee
2024-06-11 11:45:38 +02:00
Yann Gautier
b8816d3cbd refactor(st): use dashes for BSEC node names
This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.

[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/

Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2024-01-18 11:30:42 +01:00
Yann Gautier
4c8e8ea772 feat(st): update STM32MP DT files
This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415
2023-10-19 09:45:43 +02:00
Yann Gautier
f0c19f252b refactor(stm32mp15-fdts): remove unused secure-status properties
For peripheral where both status and secure-status are set to okay,
the function fdt_get_status() returns the same status (DT_SHARED) if
secure-status property is omitted. This secure-status property can then
be removed in boards DT files for iwdg nodes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I9f9360842d4d41288db0cf1b92063f347c72d137
2022-08-26 12:59:57 +02:00
Yann Gautier
0791aaf442 refactor(stm32mp15-fdts): remove RCC secure-status
The RCC security is managed with a dedicated compatible:
"st,stm32mp1-rcc-secure" [1].
Remove useless secure-status property in boards rcc nodes.

[1] 812daf916c ("feat(st): update the security based on new compatible")

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iff31044ade78dd9c432120dce65375fe2b0d36d6
2022-08-26 12:59:57 +02:00
Johann Neuhauser
119e1c42a1 refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
Change-Id: Ie650728a0c671f553679b050afd969ce604ca111
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
2022-07-08 15:26:47 +02:00
Johann Neuhauser
eef485abb1 feat(stm32mp15-fdts): add support for STM32MP157C based DHCOM SoM on PDK2 board
This is an SoM in SODIMM-200 format on an evaluation board called
"DHCOM Premium Developer Kit #2" (DHCOM PDK2 for short). The SoM features an
STM32MP157C SoC with 1 GB DDR3, 8 GB eMMC, microSD and 2 MB SPI flash.
The baseboard has multiple UART, USB, SPI, and I2C ports/headers and several
other interfaces that are not important for TF-A.

These dts(i) files are based on DHCOM dt's from Linux 5.16 and U-Boot 2022.01.
The DRAM calibration values are taken from U-Boot 2022.01 and are optimized for
industrial temperature range above 85° C.

TF-A on this board was fully tested with the latest OP-TEE developer setup.

Change-Id: I696c01742954d761fbad312cd1059e3ab01fa93c
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
2022-07-08 13:52:40 +02:00