fix(stm32mp15-fdts): correct MCO2_PLL4 clock name for DHCOM

This clock name was renamed from MCO2_PLL4P to MCO2_PLL4 with the RCC
binding update commit [1]. This file was missed in that update, and the
board fails to compile.

[1]: 52b253bfa2 feat(dt-bindings): new RCC DT bindings

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I215abff1fc275ac1ef6dfb2ac86b9223e6990064
This commit is contained in:
Yann Gautier 2024-11-20 09:37:15 +01:00
parent 847d6f4ab9
commit fc2e4bab15

View file

@ -195,7 +195,7 @@
CLK_MCU_PLL3P
CLK_RTC_LSE
CLK_MCO1_DISABLED
CLK_MCO2_PLL4P
CLK_MCO2_PLL4
CLK_CKPER_HSE
CLK_FMC_ACLK
CLK_QSPI_ACLK