From fc2e4bab15b641c71ecb820f424047276f1f41bb Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Wed, 20 Nov 2024 09:37:15 +0100 Subject: [PATCH] fix(stm32mp15-fdts): correct MCO2_PLL4 clock name for DHCOM This clock name was renamed from MCO2_PLL4P to MCO2_PLL4 with the RCC binding update commit [1]. This file was missed in that update, and the board fails to compile. [1]: 52b253bfa2 feat(dt-bindings): new RCC DT bindings Signed-off-by: Yann Gautier Change-Id: I215abff1fc275ac1ef6dfb2ac86b9223e6990064 --- fdts/stm32mp15xx-dhcom-som.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fdts/stm32mp15xx-dhcom-som.dtsi b/fdts/stm32mp15xx-dhcom-som.dtsi index 12846db8b..46ef0f059 100644 --- a/fdts/stm32mp15xx-dhcom-som.dtsi +++ b/fdts/stm32mp15xx-dhcom-som.dtsi @@ -195,7 +195,7 @@ CLK_MCU_PLL3P CLK_RTC_LSE CLK_MCO1_DISABLED - CLK_MCO2_PLL4P + CLK_MCO2_PLL4 CLK_CKPER_HSE CLK_FMC_ACLK CLK_QSPI_ACLK