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refactor(st): use dashes for BSEC node names

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This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.

[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/

Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This commit is contained in:
Yann Gautier 2024-01-04 11:45:31 +01:00
parent 436c66b32a
commit b8816d3cbd
9 changed files with 43 additions and 43 deletions
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20
fdts/stm32mp131.dtsi
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) 2022-2023, STMicroelectronics - All Rights Reserved
* Copyright (C) 2022-2024, STMicroelectronics - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
#include <dt-bindings/clock/stm32mp13-clks.h>
@ -420,25 +420,25 @@
#address-cells = <1>;
#size-cells = <1>;
cfg0_otp: cfg0_otp@0 {
cfg0_otp: cfg0-otp@0 {
reg = <0x0 0x2>;
};
part_number_otp: part-number-otp@4 {
reg = <0x4 0x2>;
};
monotonic_otp: monotonic_otp@10 {
monotonic_otp: monotonic-otp@10 {
reg = <0x10 0x4>;
};
nand_otp: cfg9_otp@24 {
nand_otp: cfg9-otp@24 {
reg = <0x24 0x4>;
};
nand2_otp: cfg10_otp@28 {
nand2_otp: cfg10-otp@28 {
reg = <0x28 0x4>;
};
uid_otp: uid_otp@34 {
uid_otp: uid-otp@34 {
reg = <0x34 0xc>;
};
hw2_otp: hw2_otp@48 {
hw2_otp: hw2-otp@48 {
reg = <0x48 0x4>;
};
ts_cal1: calib@5c {
@ -447,14 +447,14 @@
ts_cal2: calib@5e {
reg = <0x5e 0x2>;
};
pkh_otp: pkh_otp@60 {
pkh_otp: pkh-otp@60 {
reg = <0x60 0x20>;
};
mac_addr: mac_addr@e4 {
mac_addr: mac@e4 {
reg = <0xe4 0xc>;
st,non-secure-otp;
};
enckey_otp: enckey_otp@170 {
oem_enc_key: oem-enc-key@170 {
reg = <0x170 0x10>;
};
};

4
fdts/stm32mp135f-dk.dts
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
* Copyright (C) 2022-2024, STMicroelectronics - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
@ -50,7 +50,7 @@
};
&bsec {
board_id: board_id@f0 {
board_id: board-id@f0 {
reg = <0xf0 0x4>;
st,non-secure-otp;
};

18
fdts/stm32mp151.dtsi
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved
* Copyright (c) 2017-2024, STMicroelectronics - All Rights Reserved
* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -458,25 +458,25 @@
#address-cells = <1>;
#size-cells = <1>;
cfg0_otp: cfg0_otp@0 {
cfg0_otp: cfg0-otp@0 {
reg = <0x0 0x1>;
};
part_number_otp: part-number-otp@4 {
reg = <0x4 0x1>;
};
monotonic_otp: monotonic_otp@10 {
monotonic_otp: monotonic-otp@10 {
reg = <0x10 0x4>;
};
nand_otp: nand_otp@24 {
nand_otp: nand-otp@24 {
reg = <0x24 0x4>;
};
uid_otp: uid_otp@34 {
uid_otp: uid-otp@34 {
reg = <0x34 0xc>;
};
package_otp: package_otp@40 {
package_otp: package-otp@40 {
reg = <0x40 0x4>;
};
hw2_otp: hw2_otp@48 {
hw2_otp: hw2-otp@48 {
reg = <0x48 0x4>;
};
ts_cal1: calib@5c {
@ -485,10 +485,10 @@
ts_cal2: calib@5e {
reg = <0x5e 0x2>;
};
pkh_otp: pkh_otp@60 {
pkh_otp: pkh-otp@60 {
reg = <0x60 0x20>;
};
mac_addr: mac_addr@e4 {
ethernet_mac_address: mac@e4 {
reg = <0xe4 0x8>;
st,non-secure-otp;
};

4
fdts/stm32mp157c-ed1.dts
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved
* Copyright (c) 2017-2024, STMicroelectronics - All Rights Reserved
* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
*/
/dts-v1/;
@ -31,7 +31,7 @@
};
&bsec {
board_id: board_id@ec {
board_id: board-id@ec {
reg = <0xec 0x4>;
st,non-secure-otp;
};

4
fdts/stm32mp157c-odyssey-som.dtsi
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2019, STMicroelectronics. All Rights Reserved.
* Copyright (C) 2019-2024, STMicroelectronics. All Rights Reserved.
* Copyright (C) 2021, Grzegorz Szymaszek.
*
* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
@ -28,7 +28,7 @@
};
&bsec {
board_id: board_id@ec {
board_id: board-id@ec {
reg = <0xec 0x4>;
st,non-secure-otp;
};

4
fdts/stm32mp15xx-dhcom-som.dtsi
View file

@ -2,7 +2,7 @@
/*
* Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
* Copyright (C) 2022 DH electronics GmbH
* Copyright (C) 2023, STMicroelectronics - All Rights Reserved
* Copyright (C) 2023-2024, STMicroelectronics - All Rights Reserved
*/
#include "stm32mp15-pinctrl.dtsi"
@ -18,7 +18,7 @@
};
&bsec {
board_id: board_id@ec {
board_id: board-id@ec {
reg = <0xec 0x4>;
st,non-secure-otp;
};

4
fdts/stm32mp15xx-dkx.dtsi
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
* Copyright (c) 2019-2024, STMicroelectronics - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
*/
@ -29,7 +29,7 @@
};
&bsec {
board_id: board_id@ec {
board_id: board-id@ec {
reg = <0xec 0x4>;
st,non-secure-otp;
};

4
fdts/stm32mp15xx-osd32.dtsi
View file

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
/*
* Copyright (C) 2020 STMicroelectronics - All Rights Reserved
* Copyright (C) 2020-2024 STMicroelectronics - All Rights Reserved
* Copyright (C) 2020 Ahmad Fatoum, Pengutronix
*/
@ -157,7 +157,7 @@
};
&bsec {
board_id: board_id@ec {
board_id: board-id@ec {
reg = <0xec 0x4>;
st,non-secure-otp;
};

24
plat/st/stm32mp1/stm32mp1_def.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -426,24 +426,24 @@ enum ddr_type {
#define OTP_MAX_SIZE (STM32MP1_OTP_MAX_ID + 1U)
/* OTP labels */
#define CFG0_OTP "cfg0_otp"
#define CFG0_OTP "cfg0-otp"
#define PART_NUMBER_OTP "part-number-otp"
#if STM32MP15
#define PACKAGE_OTP "package_otp"
#define PACKAGE_OTP "package-otp"
#endif
#define HW2_OTP "hw2_otp"
#define HW2_OTP "hw2-otp"
#if STM32MP13
#define NAND_OTP "cfg9_otp"
#define NAND2_OTP "cfg10_otp"
#define NAND_OTP "cfg9-otp"
#define NAND2_OTP "cfg10-otp"
#endif
#if STM32MP15
#define NAND_OTP "nand_otp"
#define NAND_OTP "nand-otp"
#endif
#define MONOTONIC_OTP "monotonic_otp"
#define UID_OTP "uid_otp"
#define PKH_OTP "pkh_otp"
#define ENCKEY_OTP "enckey_otp"
#define BOARD_ID_OTP "board_id"
#define MONOTONIC_OTP "monotonic-otp"
#define UID_OTP "uid-otp"
#define PKH_OTP "pkh-otp"
#define ENCKEY_OTP "oem-enc-key"
#define BOARD_ID_OTP "board-id"
/* OTP mask */
/* CFG0 */