Commit graph

11338 commits

Author SHA1 Message Date
Manish V Badarkhe
50a43b0f64 docs(drtm): steps to run DRTM implementation
Documented steps to run DRTM implementation.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I30dd8c1088a54a8906389c2584d922862610dae0
2022-10-06 14:02:25 +01:00
Lucian Paul-Trifu
b3b227ff20 docs(drtm): add platform APIs for DRTM
Documented platform APIs for DRTM

Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I22749c26bbe7b3271705dd3db07e8597fce6225b
2022-10-06 14:02:25 +01:00
Manish Pandey
67471e75b3 feat(drtm): flush dcache before DLME launch
Flush the data cache range before DLME launch to ensure that data
passed by DCE preamble is committed.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I9946fd3420a17b86d9f1483e8b2cd5880033454e
2022-10-06 14:02:25 +01:00
Manish Pandey
2c265975a7 feat(drtm): invalidate icache before DLME launch
As per DRTM beta0 spec table #28, Before the DLME is called the DCE
must invalidate all instruction caches.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I7efbb03d1d13346a8d898882fdbd7bbe8f1d49b2
2022-10-06 14:02:25 +01:00
Manish V Badarkhe
764aa951b2 feat(drtm): ensure that passed region lies within Non-Secure region of DRAM
Ensured DLME data region and DRTM parameters are lies within Non-Secure
region of DRAM by calling platform function 'plat_drtm_validate_ns_region'.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I93ead775f45ca7748193631f8f9eec4326fcf20a
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
d5f225d95d feat(fvp): add plat API to validate that passed region is non-secure
Added a platform function to check passed region is within
the Non-Secure region of DRAM.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ie5808fa6a1b6e6bc99f4185fa8acc52af0d5f14d
2022-10-05 15:25:28 +01:00
Manish Pandey
b1392f429c feat(drtm): ensure that no SDEI event registered during dynamic launch
Ensured no SDEI event are registered during dynamic launch.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ied3b2d389aa3d9a96ace9078581d5e691f0b38a7
2022-10-05 15:25:28 +01:00
Manish Pandey
d1747e1b8e feat(drtm): prepare EL state during dynamic launch
Prepared EL state before dynamic launch

Change-Id: I3940cd7fc74da1a1addbeb08ae34f16771395e61
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
d42119cc29 feat(drtm): prepare DLME data for DLME launch
Prepared DLME data before DLME launch

Change-Id: I28e2132d9c832ab5bd25cf884925b99cc48258ea
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
2090e55283 feat(drtm): take DRTM components measurements before DLME launch
Taken measurement of various DRTM components in the Event Log
buffer to pass it to DLME.

Change-Id: Ic56620161f42596d22bf40d5c83c041cbce0b618
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
2b13a98599 feat(drtm): add a few DRTM DMA protection APIs
Added DRTM DMA protections APIs, and called them during
the DLME launch and DRTM SMC handling.

Change-Id: I29e7238c04e2ca9f26600276c5c05bff5387789e
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
1436e37dcb feat(drtm): add remediation driver support in DRTM
Added remediation driver for DRTM to set/get the error
from non-volatile memory

Change-Id: I8f0873dcef4936693e0f39a3c95096cb689c04b7
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
586f60cc57 feat(fvp): add plat API to set and get the DRTM error
Added a platform function to set and get DRTM error.
Also, added a platform function to reset the system.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I471f2387f8c78b21a06af063a6fa02cda3646557
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
40814266d5 feat(drtm): add Event Log driver support for DRTM
Added Event Log driver support for DRTM. This driver
is responsible for the doing the hash measurement of
various DRTM components as per [1], and putting these
measurements in the Event Log buffer.

[1]: https://developer.arm.com/documentation/den0113/a, section 3.16

Change-Id: I9892c313cf6640b82e261738116fe00f7975ee12
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-10-05 15:25:28 +01:00
Manish Pandey
40e1fad69b feat(drtm): check drtm arguments during dynamic launch
Check the sanity of arguments before dynamic launch.

Change-Id: Iad68f852b09851b0c55a55df6ba16576e105758a
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
2022-10-05 15:25:28 +01:00
Manish Pandey
bd6cc0b238 feat(drtm): introduce drtm dynamic launch function
This function is placeholder for checking all the necessary conditions
before doing drtm dynamic launch.
In this patch following conditions are checked (based on Table 31 of
DRTM spec beta0), rest of the conditions will be added in later
patches.
 - Only boot PE is online
 - Caller execution state is AArch64
 - Caller exception level is NS-EL2 or NS-EL1

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I622b946bc191bb39f828831336ceafbc10834c19
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
b9b175086c refactor(measured-boot): split out a few Event Log driver functions
Reorganized a few Event Log functions into multiple functions so that
they can be used for the upcoming DRTM feature. This change mainly
implements below new functions -
1. event_log_buf_init - called by 'event_log_init' to initialise Event
   Log buffer
2. event_log_write_specid_event - called by 'event_log_fixed_header' to
   write specification id event to Event Log buffer
3. event_log_measure and event_log_record - called by
   'event_log_measure_and_record' to measure and record the measurement
   to the Event Log buffer

Change-Id: I1aabb57f79bead726fcf36d59839702cd6a3521d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
e9467afb2d feat(drtm): retrieve DRTM features
Retrieved below DRTM features via DRTM_FEATURES SMC call -
1. TPM features
2. Minimum memory requirement
3. Boot PE ID
4. DMA protection

Change-Id: Ia6dc497259541ce30a6550afa35d95d9a9a366af
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
2022-10-05 15:25:28 +01:00
johpow01
2a1cdee4f5 feat(drtm): add platform functions for DRTM
Added platform hooks to retrieve DRTM features and
address map.
Additionally, implemented these hooks for the FVP platform.

Signed-off-by: John Powell <john.powell@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I5621cc9807ffff8139ae8876250147f7b2c76759
2022-10-05 15:25:28 +01:00
John Powell
e6381f9cf8 feat(sdei): add a function to return total number of events registered
This patch adds a public API to return the total number of registered
events. The purpose of this is primarily for DRTM to ensure that no
SDEI event can interfere with a dynamic launch.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I1d1cba2da7d5566cc340620ee1ce7d7844740b86
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
ff1e42e20a feat(drtm): add PCR entries for DRTM
Added PCR entries for the measurement performed by the
DCE and D-CRTM in DRTM implementation

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: Ib9bfafe7fa2efa1cc36d7ff138468d648235dcf1
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
d54792bd93 feat(drtm): update drtm setup function
Updated DRTM setup functionality that mainly does below 2 things
1. Initialise the DRTM DMA protection, this function assumes the
   platform must support complete DMA protection.
2. Initialise the Crypto module that will be useful to calculate
   the hash of various DRTM element involved.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: I3d6e4d534686d391fa7626094d2b2535dac74e00
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
2bf4f27f58 refactor(crypto): change CRYPTO_SUPPORT flag to numeric
Updated CRYPTO_SUPPORT flag to numeric to provide below
supports -
1. CRYPTO_SUPPORT = 1 -> Authentication verification only
2. CRYPTO_SUPPORT = 2 -> Hash calculation only
3. CRYPTO_SUPPORT = 3 -> Authentication verification and
                         hash calculation

Change-Id: Ib34f31457a6c87d2356d736ad2d048dc787da56f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
8b653909b7 feat(mbedtls): update mbedTLS driver for DRTM support
Updated mbedTLS driver to include mbedTLS functions necessary for a
DRTM supported build.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: If0120374a971519cf84f93e0c59e1a320a72cd97
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
c9bd1bacff feat(fvp): add crypto support in BL31
DRTM implementation needs crypto support in BL31 to calculate
hash of various DRTM components

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I659ce8e54550946db253d23f150cca8b2fa7b880
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
e43caf3890 feat(crypto): update crypto module for DRTM support
Updated crypto module to include crypto calls necessary for a
DRTM supported build.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I4f945997824393f46864b7fb7fd380308a025452
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
9e0d2bae7e build(changelog): add new scope for mbedTLS and Crypto module
Added new scope for mbedTLS and Crypto module.

Change-Id: I127e7e32f103210e0a1c4c3072afa7249a24a7db
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
e62748e3f1 feat(drtm): add standard DRTM service
Added a dummy DRTM setup function and also, introduced DRTM SMCs
handling as per DRTM spec [1]. Few basic SMCs are handled in this
change such as ARM_DRTM_SVC_VERSION and ARM_DRTM_SVC_FEATURES
that returns DRTM version and functions ids supported respectively,
and others are dummy for now.

[1]: https://developer.arm.com/documentation/den0113/latest

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: I8c7afe920c78e064cbab2298f59e6837c70ba8ff
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
7b224f19f4 build(changelog): add new scope for DRTM service
Added new scope for DRTM service.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Idffb178026ef2910102b55e640d5f5bf904e6064
2022-10-05 15:25:28 +01:00
Manish V Badarkhe
8a8dace5a5 feat(fvp): increase MAX_XLAT_TABLES entries for DRTM support
DRTM implementation maps the DLME data region provided by the
DCE-preamble in BL31, hence increased MAX_XLAT_TABLES entries
count.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: I5f0ac69e009c4f81d3590fdb1f4c0a7f73c5c99d
2022-10-05 15:25:28 +01:00
Lucian Paul-Trifu
44df105ff8 feat(fvp): increase BL31's stack size for DRTM support
The stack size of BL31 has been increased to accommodate the
introduction of mbedTLS support for DRTM.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: Id0beacf4df553af4ecbe714af20e71604ccfed59
2022-10-05 15:25:28 +01:00
Lucian Paul-Trifu
d72c486b52 feat(fvp): add platform hooks for DRTM DMA protection
Added necessary platform hooks for DRTM DMA protection.
These calls will be used by the subsequent DRTM implementation
patches.
DRTM platform API declarations have been listed down in a
separate header file.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: Ib9726d1d3570800241bde702ee7006a64f1739ec
2022-10-05 15:25:28 +01:00
Sandrine Bailleux
6f70cce625 Merge "fix(qemu): enable SVE and SME" into integration 2022-10-05 15:08:32 +02:00
Sandrine Bailleux
2ddb5415ca Merge "fix(rss): fix build issues with comms protocol" into integration 2022-10-05 14:44:05 +02:00
Tamas Ban
ab545efddc fix(rss): fix build issues with comms protocol
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I77d2d3c5ac39a840b768f84f859d76b3965749aa
2022-10-05 13:37:35 +02:00
Olivier Deprez
af1ee1fad2 Merge changes from topic "mt8188 cpu_pm" into integration
* changes:
  feat(mediatek): move lpm drivers back to common
  feat(mt8188): add cpu_pm driver
  fix(mt8188): refine c-state power domain for extensibility
2022-10-05 13:37:10 +02:00
Olivier Deprez
a9120f596f Merge "fix(mt8186-emi-mpu): fix SCP permission" into integration 2022-10-05 11:31:36 +02:00
Andre Przywara
337ff4f1dd fix(qemu): enable SVE and SME
Starting with QEMU v3.1.0 (Dec 2018), QEMU's TCG emulation engine supports
the SVE architecture extension. In QEMU v7.1.0 (Aug 2022) it also gained
SME support.

As it stands today, running TF-A under QEMU with "-cpu max" makes Linux
hang, because SME and SVE accesses trap to EL3, but are never handled
there. This is because the Linux kernel sees the SVE or SME feature bits,
and assumes firmware has enabled the feature for lower exception levels.
This requirement is described in the Linux kernel booting protocol.

Enable those features in the TF-A build, so that BL31 does the proper
EL3 setup to make the feature usable in non-secure world.
We check the actual feature bits before accessing SVE or SME registers,
so this is safe even for older QEMU version or when not running with
-cpu max. As SVE and SME are AArch64 features only, do not enable them
when building for AArch32.

Change-Id: I5b718eb298a0bbcf36244479e8d42e54a2faca61
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-05 10:17:55 +01:00
Manish Pandey
4f2c4ecfb0 Merge changes from topic "aarch32_debug_aborts" into integration
* changes:
  feat(stm32mp1): add plat_report_*_abort functions
  feat(debug): add helpers for aborts on AARCH32
  feat(debug): add AARCH32 CP15 fault registers
2022-10-05 11:15:28 +02:00
Manish Pandey
afc9b23b13 Merge "feat(fvp): support building RSS comms driver" into integration 2022-10-05 11:00:26 +02:00
Madhukar Pappireddy
c19116dd61 Merge "refactor(console): move putchar() to console driver" into integration 2022-10-04 17:06:43 +02:00
Yidi Lin
8a998b5aca fix(mt8186-emi-mpu): fix SCP permission
Hardware video decoding is not working after enabling EMI MPU protection
for SCP.

According to coreboot DEVAPC setting, SCP belongs to domain 4 instead of
domain 3. So correct the permission setting.

BUG=b:249954378
TEST=play video and see codec irq count is incrementing.

Signed-off-by: Yidi Lin <yidilin@chromium.org>
Change-Id: If71de3eabf8682909f96924c159aa92f25deb96c
2022-10-04 22:31:16 +08:00
Manish V Badarkhe
b97b2817ac Merge "fix(versal-net): use api_id directly without FUNCID_MASK" into integration 2022-10-04 11:50:43 +02:00
Manish V Badarkhe
252b2bd8a3 Merge changes I134f125f,Ia4bf45bf into integration
* changes:
  refactor(sgi): rename RD-Edmunds to RD-V2
  refactor(cpu): use the updated IP name for Demeter CPU
2022-10-04 10:45:50 +02:00
Claus Pedersen
e0b6826e44 refactor(console): move putchar() to console driver
Moving putchar() out of libc and adding a weak dummy
implementation in libc.

This is to remove libc's dependencies to the platform
driver.

Signed-off-by: Claus Pedersen <claustbp@google.com>
Change-Id: Ib7fefaec0babb783def614ea23521f482fa4a28a
2022-10-04 09:30:48 +02:00
Bo-Chen Chen
cd7890d79e feat(mediatek): move lpm drivers back to common
In order to sync drivers with MediaTek internal code base, we move lpm
drivers back to common folder.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I1066e092febe0abb9782a46f668613e137737c88
2022-10-04 09:52:10 +08:00
Edward-JW Yang
4fe7e6a8d9 feat(mt8188): add cpu_pm driver
- Add cpu_pm driver for CPU idle and SMP flow.
- Add SMP driver for CPU power on/off control.
- Add CPC driver to handle CPU powered on/off in CPU suspend.
- Add mbox driver for tinysys support.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: I20141474e1c43cdfacb9f2c6a2285721e50a617c
2022-10-04 09:52:10 +08:00
Edward-JW Yang
e35f4cbf80 fix(mt8188): refine c-state power domain for extensibility
1. MT8188 uses "suspend to RAM" instead of "suspend to idle", so
   remove s2idle state.
2. Definition c-state power domain:
    - bit[7:4] (main state id):
      1: Cluster.
      2: Mcusys.
      3: Memory.
      4: System pll.
      5: System bus.
      6: SoC 26m/DCXO.
      7: Vcore buck.
      15: Suspend.
    - bit[3:0] (reserved for state_id extension):
      4: CPU buck.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Ibacd3d642f78726e1f1c08f18892481d2695f9e6
2022-10-04 09:44:08 +08:00
Manish Pandey
9bd1aed30d Merge "refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe" into integration 2022-10-03 16:46:52 +02:00
Yann Gautier
0423868373 feat(stm32mp1): add plat_report_*_abort functions
The new helpers are created in STM32MP1 platform for prefetch and data
aborts.
While at it, put plat_report_exception() under DEBUG flag. If DEBUG is
not set, the weak function which does the same will be used.
This plat_report_exception() function can also be simplified, as it will
no more be used to report aborts.

Change-Id: Ibe989b28e236693f317cffb0545ea0611b7bdde4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-10-03 14:44:05 +02:00