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feat(drtm): retrieve DRTM features

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Retrieved below DRTM features via DRTM_FEATURES SMC call -
1. TPM features
2. Minimum memory requirement
3. Boot PE ID
4. DMA protection

Change-Id: Ia6dc497259541ce30a6550afa35d95d9a9a366af
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
This commit is contained in:
Manish V Badarkhe 2022-06-16 13:46:43 +01:00
parent 2a1cdee4f5
commit e9467afb2d
2 changed files with 75 additions and 1 deletions
include/services
drtm_svc.h
services/std_svc/drtm
drtm_main.c

9
include/services/drtm_svc.h
View file

@ -44,6 +44,12 @@
#define ARM_DRTM_SVC_SET_TCB_HASH DRTM_FID(DRTM_FNUM_SVC_SET_TCB_HASH)
#define ARM_DRTM_SVC_LOCK_TCB_HASH DRTM_FID(DRTM_FNUM_SVC_LOCK_TCB_HASH)
#define ARM_DRTM_FEATURES_TPM U(0x1)
#define ARM_DRTM_FEATURES_MEM_REQ U(0x2)
#define ARM_DRTM_FEATURES_DMA_PROT U(0x3)
#define ARM_DRTM_FEATURES_BOOT_PE_ID U(0x4)
#define ARM_DRTM_FEATURES_TCB_HASHES U(0x5)
#define is_drtm_fid(_fid) \
(((_fid) >= ARM_DRTM_SVC_VERSION) && ((_fid) <= ARM_DRTM_SVC_LOCK_TCB_HASH))
@ -62,9 +68,10 @@
ARM_DRTM_VERSION_MINOR_SHIFT))
#define ARM_DRTM_FUNC_SHIFT U(63)
#define ARM_DRTM_FUNC_MASK U(0x1)
#define ARM_DRTM_FUNC_MASK ULL(0x1)
#define ARM_DRTM_FUNC_ID U(0x0)
#define ARM_DRTM_FEAT_ID U(0x1)
#define ARM_DRTM_FEAT_ID_MASK ULL(0xff)
/*
* Definitions for DRTM features as per DRTM beta0 section 3.3,

67
services/std_svc/drtm/drtm_main.c
View file

@ -119,6 +119,36 @@ int drtm_setup(void)
return 0;
}
static inline uint64_t drtm_features_tpm(void *ctx)
{
SMC_RET2(ctx, 1ULL, /* TPM feature is supported */
plat_drtm_features.tpm_features);
}
static inline uint64_t drtm_features_mem_req(void *ctx)
{
SMC_RET2(ctx, 1ULL, /* memory req Feature is supported */
plat_drtm_features.minimum_memory_requirement);
}
static inline uint64_t drtm_features_boot_pe_id(void *ctx)
{
SMC_RET2(ctx, 1ULL, /* Boot PE feature is supported */
plat_drtm_features.boot_pe_id);
}
static inline uint64_t drtm_features_dma_prot(void *ctx)
{
SMC_RET2(ctx, 1ULL, /* DMA protection feature is supported */
plat_drtm_features.dma_prot_features);
}
static inline uint64_t drtm_features_tcb_hashes(void *ctx)
{
SMC_RET2(ctx, 1ULL, /* TCB hash feature is supported */
plat_drtm_features.tcb_hash_features);
}
uint64_t drtm_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
@ -192,6 +222,43 @@ uint64_t drtm_smc_handler(uint32_t smc_fid,
SMC_RET1(handle, NOT_SUPPORTED);
break; /* not reached */
}
} else {
/* Dispatch feature-based queries. */
switch (x1 & ARM_DRTM_FEAT_ID_MASK) {
case ARM_DRTM_FEATURES_TPM:
INFO("++ DRTM service handler: TPM features\n");
return drtm_features_tpm(handle);
break; /* not reached */
case ARM_DRTM_FEATURES_MEM_REQ:
INFO("++ DRTM service handler: Min. mem."
" requirement features\n");
return drtm_features_mem_req(handle);
break; /* not reached */
case ARM_DRTM_FEATURES_DMA_PROT:
INFO("++ DRTM service handler: "
"DMA protection features\n");
return drtm_features_dma_prot(handle);
break; /* not reached */
case ARM_DRTM_FEATURES_BOOT_PE_ID:
INFO("++ DRTM service handler: "
"Boot PE ID features\n");
return drtm_features_boot_pe_id(handle);
break; /* not reached */
case ARM_DRTM_FEATURES_TCB_HASHES:
INFO("++ DRTM service handler: "
"TCB-hashes features\n");
return drtm_features_tcb_hashes(handle);
break; /* not reached */
default:
ERROR("Unknown ARM DRTM service feature\n");
SMC_RET1(handle, NOT_SUPPORTED);
break; /* not reached */
}
}
case ARM_DRTM_SVC_UNPROTECT_MEM: