Commit graph

19 commits

Author SHA1 Message Date
Yidi Lin
22d74da7cd feat(mt8196): add reset and poweroff function for PSCI call
Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chromium.org>
2025-02-05 23:56:28 +08:00
ot_chhao.chang
49d8c11285 feat(mt8196): enable cirq for MediaTek MT8196
- Add CIRQ related information.

Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com>
Change-Id: I758e933f9d53f7bfb16e3d7feb1c7f53516b1da6
2025-01-30 23:28:17 +08:00
Govindraj Raja
ff82102505 Merge "feat(mediatek): add gic driver" into integration 2025-01-29 23:08:26 +01:00
Wenzhen Yu
fb57af70ae feat(mt8196): add SPM basic features support
This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ie51cffeb1d683d65d88701fc63c426b20b22492f
2025-01-22 15:28:08 +08:00
Kai Liang
5cb0bc07e3 feat(mt8196): add mcdi driver
Add MCDI driver to manage CPU idle states and optimize power consumption.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea38d728cb7
2025-01-22 12:01:28 +08:00
Kai Liang
4ba679da8b feat(mt8196): add pwr_ctrl module for CPU power management
Implement pwr_ctrl module to manage CPU power.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f323990176397b6e4a5
2025-01-22 11:53:33 +08:00
Hope Wang
adf73ae20a feat(mt8196): add SPMI driver
Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
2025-01-22 11:51:07 +08:00
Runyang Chen
d905b3df30 feat(mediatek): add gic driver
Add GIC driver for taking interrupts to core.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Id4d702b8579488befc1a1b6d37e66287dd534798
2025-01-14 05:17:49 +02:00
Gavin Liu
39f5e27820 feat(mt8196): add Mediatek EMI stub implementation for mt8196
Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.

Change-Id: I296945a3df6766a3a133cd385a1e5038ca979403
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
2025-01-09 09:16:00 +02:00
Karl Li
f31932b430 feat(mt8196): add APU RCX DevAPC setting
APU RCX is a sub-domain in apusys, connecting several APU components.
The APU RCX DevAPC control lives in APU and can only be set after
APU is powered on.
The APUSYS kernel driver will trigger RCX DevAPC init by smc call.

Change-Id: I3a9b014ea1be7ee80fd6861ad088f1dec5410872
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:56:04 +08:00
Karl Li
5e5c57d52b feat(mt8196): add APU kernel control operations
Add APU kernel control operations to provide the bootup init functions.

1. Add software workaround for certain operations on mt8196.
2. Add APU logger operations.
3. Add function to clear mbox spare register, which is used in APU
   booting process.
4. Add function to setup CE binary to make sure the CE binary version
   is align with the APU firmware.

Change-Id: Ic99adba1409c020c72179ea135e0d4291fc3f384
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:56:04 +08:00
Karl Li
e534d4f633 feat(mt8196): add APUMMU setting
APUMMU is the MMU in APU, which is responsible for inner address
mapping. The APU kernel driver will setup the APUMMU by SMC call.

Change-Id: Iad7532883e42c288aeb0d23ab419f4dc6d8630f2
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:56:04 +08:00
Karl Li
83f836c962 feat(mt8196): enable apusys mailbox mpu protection
Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder

Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:56:04 +08:00
Karl Li
9059a375ee feat(mt8196): enable apusys security control
Remap the request from domain 5, 7, 14 to domain 6 and setup security
sideband

Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:55:23 +08:00
Karl Li
31a0b87756 feat(mt8196): add APUSYS AO DevAPC setting
Apusys AO DevAPC is a set of control registers inside APU, controlling
the access permission of APU AO (Always On) domain.

This patch add the mt8196 APU AO DevAPC setting to setup the protection.

Change-Id: I975a92795031cd1813442302890e29b671ef16f1
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:55:23 +08:00
Karl Li
0781f7804a feat(mt8196): add APU power-on init flow
Add the APU (AI processing unit) power init flow to prepare the hardware
setting before using APU power functions.

Change-Id: I595b1d5100a4f083263de6527f920e5168700b7a
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:55:23 +08:00
Mac Shen
3e43d1d317 feat(mt8196): enable DP and eDP for mt8196
- Add register definitions for DP
- Add mmap entry for DP register access

Change-Id: I22ed9fa36a7e13fcaed0c137d0e8f4449b6a52d7
Signed-off-by: Mac Shen <mac.shen@mediatek.com>
2024-12-10 10:25:01 +02:00
Cathy Xu
4cb9f2a5bf feat(mt8196): add GPIO support
- MT8196 has 271 GPIO pins. Therefore, update id to a proper datatype.
- Add GPIO support for MT8196.

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I283939684b54f79d1bba02f38e047e756a56f0c9
2024-12-04 14:30:34 +08:00
Gavin Liu
a65fadfbbd feat(mt8196): initialize platform for MediaTek MT8196
- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add timer driver configuration.

Change-Id: I07fcdeb785fcda4a955c11c39a345da4ad05ef04
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2024-12-02 09:20:48 +08:00