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Merge changes from topic "jc/psci_spe" into integration
* changes: fix(spe): invoke spe_disable during power domain off/suspend feat(psci): add psci_do_manage_extensions API fix(arm_fpga): halve number of PEs per core
This commit is contained in:
commit
3d630fa26a
5 changed files with 66 additions and 15 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -94,6 +94,7 @@ int psci_stop_other_cores(unsigned int wait_ms,
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bool psci_is_last_on_cpu_safe(void);
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bool psci_are_all_cpus_on_safe(void);
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void psci_pwrdown_cpu(unsigned int power_level);
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void psci_do_manage_extensions(void);
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#endif /* __ASSEMBLER__ */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -12,6 +12,14 @@
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#include <lib/el3_runtime/pubsub.h>
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#include <lib/extensions/spe.h>
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#include <plat/common/platform.h>
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typedef struct spe_ctx {
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u_register_t pmblimitr_el1;
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} spe_ctx_t;
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static struct spe_ctx spe_ctxs[PLATFORM_CORE_COUNT];
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static inline void psb_csync(void)
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{
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/*
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@ -89,4 +97,35 @@ static void *spe_drain_buffers_hook(const void *arg)
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return (void *)0;
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}
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static void *spe_context_save(const void *arg)
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{
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unsigned int core_pos;
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struct spe_ctx *ctx;
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if (is_feat_spe_supported()) {
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core_pos = plat_my_core_pos();
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ctx = &spe_ctxs[core_pos];
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ctx->pmblimitr_el1 = read_pmblimitr_el1();
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}
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return NULL;
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}
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static void *spe_context_restore(const void *arg)
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{
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unsigned int core_pos;
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struct spe_ctx *ctx;
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if (is_feat_spe_supported()) {
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core_pos = plat_my_core_pos();
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ctx = &spe_ctxs[core_pos];
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write_pmblimitr_el1(ctx->pmblimitr_el1);
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}
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return NULL;
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}
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SUBSCRIBE_TO_EVENT(cm_entering_secure_world, spe_drain_buffers_hook);
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SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_start, spe_context_save);
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SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_finish, spe_context_restore);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -8,12 +8,14 @@
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#include <string.h>
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#include <arch.h>
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <context.h>
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#include <drivers/delay_timer.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include <lib/extensions/spe.h>
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#include <lib/utils.h>
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#include <plat/common/platform.h>
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@ -1164,6 +1166,8 @@ int psci_secondaries_brought_up(void)
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******************************************************************************/
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void psci_pwrdown_cpu(unsigned int power_level)
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{
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psci_do_manage_extensions();
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#if HW_ASSISTED_COHERENCY
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/*
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* With hardware-assisted coherency, the CPU drivers only initiate the
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@ -1283,3 +1287,20 @@ bool psci_are_all_cpus_on_safe(void)
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return true;
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}
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/*******************************************************************************
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* This function performs architectural feature specific management.
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* It ensures the architectural features are disabled during cpu
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* power off/suspend operations.
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******************************************************************************/
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void psci_do_manage_extensions(void)
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{
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/*
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* On power down we need to disable statistical profiling extensions
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* before exiting coherency.
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*/
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if (is_feat_spe_supported()) {
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spe_disable();
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}
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}
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@ -21,7 +21,7 @@
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#define FPGA_MAX_CLUSTER_COUNT 4
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#define FPGA_MAX_CPUS_PER_CLUSTER 8
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#define FPGA_MAX_PE_PER_CPU 4
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#define FPGA_MAX_PE_PER_CPU 2
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#define FPGA_PRIMARY_CPU 0x0
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/*******************************************************************************
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@ -1,17 +1,15 @@
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/*
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* Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <drivers/arm/gicv3.h>
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#include <drivers/arm/fvp/fvp_pwrc.h>
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#include <lib/extensions/spe.h>
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#include <lib/mmio.h>
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#include <lib/psci/psci.h>
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#include <plat/arm/common/arm_config.h>
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@ -54,14 +52,6 @@ static void fvp_cluster_pwrdwn_common(void)
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{
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uint64_t mpidr = read_mpidr_el1();
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/*
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* On power down we need to disable statistical profiling extensions
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* before exiting coherency.
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*/
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if (is_feat_spe_supported()) {
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spe_disable();
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}
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/* Disable coherency if this cluster is to be turned off */
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fvp_interconnect_disable();
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