From 70b9204e6f98f1ec4f0529e8c1c88e8ece490d22 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 2 Feb 2024 17:09:46 +0000 Subject: [PATCH 1/3] fix(arm_fpga): halve number of PEs per core When creating the Arm FPGA platform, we had plenty of memory available, so assigned a generous four PEs per core for the potential CPU topology. In reality we barely see implementations with two PEs per core, and didn't have four at all so far. With some design changes we now include more data per CPU type, and since the Arm FPGA build supports many cores (and determines the correct one at runtime), we run out of memory with certain build options. Since we don't really need four PEs per core, just halve that number, to reduce our memory footprint without sacrificing functionality. Signed-off-by: Andre Przywara Change-Id: Ieb37ccc9f362b10ff0ce038f72efca21512a71cb --- plat/arm/board/arm_fpga/fpga_def.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/arm/board/arm_fpga/fpga_def.h b/plat/arm/board/arm_fpga/fpga_def.h index 2884ea6d4..5e3a0a995 100644 --- a/plat/arm/board/arm_fpga/fpga_def.h +++ b/plat/arm/board/arm_fpga/fpga_def.h @@ -21,7 +21,7 @@ #define FPGA_MAX_CLUSTER_COUNT 4 #define FPGA_MAX_CPUS_PER_CLUSTER 8 -#define FPGA_MAX_PE_PER_CPU 4 +#define FPGA_MAX_PE_PER_CPU 2 #define FPGA_PRIMARY_CPU 0x0 /******************************************************************************* From 160e8434baa48cc19d69913b00d2a643c788caec Mon Sep 17 00:00:00 2001 From: Jayanth Dodderi Chidanand Date: Thu, 14 Sep 2023 11:07:02 +0100 Subject: [PATCH 2/3] feat(psci): add psci_do_manage_extensions API Adding a new API under PSCI library,for managing all the architectural features, required during power off or suspend cases. Change-Id: I1659560daa43b9344dd0cc0d9b311129b4e9a9c7 Signed-off-by: Jayanth Dodderi Chidanand --- include/lib/psci/psci_lib.h | 3 ++- lib/psci/psci_common.c | 12 ++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/include/lib/psci/psci_lib.h b/include/lib/psci/psci_lib.h index 4b244ec33..c50f8cbb1 100644 --- a/include/lib/psci/psci_lib.h +++ b/include/lib/psci/psci_lib.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2022, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -94,6 +94,7 @@ int psci_stop_other_cores(unsigned int wait_ms, bool psci_is_last_on_cpu_safe(void); bool psci_are_all_cpus_on_safe(void); void psci_pwrdown_cpu(unsigned int power_level); +void psci_do_manage_extensions(void); #endif /* __ASSEMBLER__ */ diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c index f9de432b2..1333b1a46 100644 --- a/lib/psci/psci_common.c +++ b/lib/psci/psci_common.c @@ -1164,6 +1164,8 @@ int psci_secondaries_brought_up(void) ******************************************************************************/ void psci_pwrdown_cpu(unsigned int power_level) { + psci_do_manage_extensions(); + #if HW_ASSISTED_COHERENCY /* * With hardware-assisted coherency, the CPU drivers only initiate the @@ -1283,3 +1285,13 @@ bool psci_are_all_cpus_on_safe(void) return true; } + +/******************************************************************************* + * This function performs architectural feature specific management. + * It ensures the architectural features are disabled during cpu + * power off/suspend operations. + ******************************************************************************/ +void psci_do_manage_extensions(void) +{ + +} From 777f1f6897b57fe98c70d17c0d318aab3b86e119 Mon Sep 17 00:00:00 2001 From: Jayanth Dodderi Chidanand Date: Tue, 18 Jul 2023 14:48:09 +0100 Subject: [PATCH 3/3] fix(spe): invoke spe_disable during power domain off/suspend spe_disable function, disables profiling and flushes all the buffers and hence needs to be called on power-off/suspend path. It needs to be invoked as SPE feature writes to memory as part of regular operation and not disabling before exiting coherency could potentially cause issues. Currently, this is handled only for the FVP. Other platforms need to replicate this behaviour and is covered as part of this patch. Calling it from generic psci library code, before the platform specific actions to turn off the CPUs, will make it applicable for all the platforms which have ported the PSCI library. Change-Id: I90b24c59480357e2ebfa3dfc356c719ca935c13d Signed-off-by: Jayanth Dodderi Chidanand --- lib/extensions/spe/spe.c | 41 ++++++++++++++++++++++++++++++++++++- lib/psci/psci_common.c | 11 +++++++++- plat/arm/board/fvp/fvp_pm.c | 12 +---------- 3 files changed, 51 insertions(+), 13 deletions(-) diff --git a/lib/extensions/spe/spe.c b/lib/extensions/spe/spe.c index 2c25a9db7..d1fb18292 100644 --- a/lib/extensions/spe/spe.c +++ b/lib/extensions/spe/spe.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -12,6 +12,14 @@ #include #include +#include + +typedef struct spe_ctx { + u_register_t pmblimitr_el1; +} spe_ctx_t; + +static struct spe_ctx spe_ctxs[PLATFORM_CORE_COUNT]; + static inline void psb_csync(void) { /* @@ -89,4 +97,35 @@ static void *spe_drain_buffers_hook(const void *arg) return (void *)0; } +static void *spe_context_save(const void *arg) +{ + unsigned int core_pos; + struct spe_ctx *ctx; + + if (is_feat_spe_supported()) { + core_pos = plat_my_core_pos(); + ctx = &spe_ctxs[core_pos]; + ctx->pmblimitr_el1 = read_pmblimitr_el1(); + } + + return NULL; +} + +static void *spe_context_restore(const void *arg) +{ + unsigned int core_pos; + struct spe_ctx *ctx; + + if (is_feat_spe_supported()) { + core_pos = plat_my_core_pos(); + ctx = &spe_ctxs[core_pos]; + write_pmblimitr_el1(ctx->pmblimitr_el1); + } + + return NULL; +} + SUBSCRIBE_TO_EVENT(cm_entering_secure_world, spe_drain_buffers_hook); + +SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_start, spe_context_save); +SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_finish, spe_context_restore); diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c index 1333b1a46..41c79190b 100644 --- a/lib/psci/psci_common.c +++ b/lib/psci/psci_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,12 +8,14 @@ #include #include +#include #include #include #include #include #include #include +#include #include #include @@ -1293,5 +1295,12 @@ bool psci_are_all_cpus_on_safe(void) ******************************************************************************/ void psci_do_manage_extensions(void) { + /* + * On power down we need to disable statistical profiling extensions + * before exiting coherency. + */ + if (is_feat_spe_supported()) { + spe_disable(); + } } diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c index 51dda9ec0..b3d503e60 100644 --- a/plat/arm/board/fvp/fvp_pm.c +++ b/plat/arm/board/fvp/fvp_pm.c @@ -1,17 +1,15 @@ /* - * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include -#include #include #include #include #include -#include #include #include #include @@ -54,14 +52,6 @@ static void fvp_cluster_pwrdwn_common(void) { uint64_t mpidr = read_mpidr_el1(); - /* - * On power down we need to disable statistical profiling extensions - * before exiting coherency. - */ - if (is_feat_spe_supported()) { - spe_disable(); - } - /* Disable coherency if this cluster is to be turned off */ fvp_interconnect_disable();