Tom Rini <trini@konsulko.com> says:
This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.
Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
Expand the conditional compilation section to explain when to use
CONFIG_IS_ENABLED rather than IS_ENABLED and provide an example. Next,
note what the PHASE_ macro is supposed to be used for as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to make a start on explaining how and when to use certain
macros, we need to document their usage somewhere. As a first step, take
section 21 of the v6.13 Linux Kernel coding-style document on
conditional compilation, verbatim, and add it to our documentation.
Further rewording to be clearer about U-Boot will be done next.
Signed-off-by: Tom Rini <trini@konsulko.com>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.
Signed-off-by: Tom Rini <trini@konsulko.com>
When the `optee hello' subcommand is called, the do_optee_hello_world_ta()
function passes a NULL pointer to the strcmp() function while verifying its
input argument, which results in the following crash:
=> optee hello
"Synchronous Abort" handler, esr 0x96000010, far 0x0
Fix this by verifying the number of input arguments instead.
Fixes: e3cf80fbe0 ("cmd: Add support for optee commands")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jerome Forissier <jerome.forissier@linaro.org>
Cc: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
The number of memory banks in QEMU is not bounded by 1.
In this example we have two banks:
qemu-system-aarch64 \
-machine virt \
-nographic \
-cpu cortex-a72 \
-m 8G \
-smp 8,sockets=2,cores=4,threads=1 \
-object memory-backend-ram,id=mem0,size=4G \
-numa node,cpus=0-3,memdev=mem0 \
-object memory-backend-ram,id=mem1,size=4G \
-numa node,cpus=4-7,memdev=mem1 \
-bios u-boot.bin
Use the default value defined in /Kconfig as 4.
Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Suggested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The AM62x uses the DA8XX (DaVinci) GPIO controller. Enable
CONFIG_DA8XX_GPIO to support GPIO access from the Cortex-A53.
Also enable the 'gpio' command to allow users to interact
with GPIOs from the U-Boot shell.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This enables the 'rproc' command, allowing users to
start, stop, and manage co-processors as well as load firmware
images.
Useful for systems with auxiliary cores, such as the M4 core
in the AM62x soc.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This enables the 'rproc' command, allowing users to
start, stop, and manage co-processors as well as load firmware
images.
Useful for systems with auxiliary cores, such as M4 or R5 cores
in the AM64x soc.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The CI image does not ship with all tools required for the binman tests.
Have binman build the missing tools.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
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Merge tag 'qcom-for-2025.07' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Qualcomm changes for v2025.07:
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/25653
There's been a surprising amount of activity lately on the Qualcomm
side with the two oldest boards getting some fresh attention and a lot
of cleanup and polish going on across the board.
* SDM660 gets USB phy fixes and a pinctrl driver
* The recently added SA8775P/QCS9100 SoC gets a pinctrl driver
* The Qualcomm pinctrl driver now handles reserved pins correctly,
fixing crashes on some boards when running "gpio status -a"
* OF_UPSTREAM_BUILD_VENDOR is enabled in qcom_defconfig
* SDM845 and SC7280 get missing clocks added (since we're now stricter
about those). This gets USB working more reliably in more cases.
* DM_USB_GADGET is enabled for all boards using DWC3 and fasbtoot is
enabled too
* A bug in the livetree fixup code is fixed (making USB work on a lot
more platforms)
* Button label lookup is made case insensitive* bootretry becomes more dynamic, allowing it to be hijacked to make a
"persistent" boot menu that allows dropping to U-Boot shell later on
* A new qcom-phone.config fragment is added along with a phone-specific
default environment and phone-specific debugging/bringup docs. These
make U-Boot more usable on devices without a serial port or keyboard.
* The db820c gets fixed up and updated documentation
* The db410c also gets some love and modernisation as well as a new
reviewer.
* A new driver is added for the USB VBUS regulator found on various
Qualcomm PMICs
* The Qualcomm SPMI driver gets some fixes and cleanup for SPMI v5 and
v7 support.
Documentation:
* Update authenticated capsules documentation
UEFI:
* add support for loading FIT images including initrd
- efi_loader: efi_load_initrd: provide a memory mapped initrd
- efi_loader: binary_run: register an initrd
- bootm: add support for initrd in do_bootm_efi
* efi_selftest: remove un-needed NULL checks
* efi: Fix efiboot for payloads loaded from memory
* Print extra information from the bootmgr
* Move public cert for capsules to .rodata
* set EFI capsule dfu_alt_info env explicitly
* Make FDT extra space configurable
* Install the ACPI table from the bloblist
* Handle GD_FLG_SKIP_RELOC
* handle malloc() errors
Others:
* acpi: select CONFIG_BLOBLIST
* smbios: select CONFIG_BLOBLIST
* xilinx: dfu: Fill directly update_info.dfu_string
* cmd: fwu: Dump custom fields from mdata structure
* board: remove capsule update support in set_dfu_alt_info()
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Merge tag 'efi-2025-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2025-07-rc1
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25648
Documentation:
* Update authenticated capsules documentation
UEFI:
* Add support for loading FIT images including initrd
- efi_loader: efi_load_initrd: provide a memory mapped initrd
- efi_loader: binary_run: register an initrd
- bootm: add support for initrd in do_bootm_efi
* efi_selftest: remove un-needed NULL checks
* efi: Fix efiboot for payloads loaded from memory
* Print extra information from the bootmgr
* Move public cert for capsules to .rodata
* Set EFI capsule dfu_alt_info env explicitly
* Make FDT extra space configurable
* Install the ACPI table from the bloblist
* Handle GD_FLG_SKIP_RELOC
* Handle malloc() errors
Others:
* acpi: select CONFIG_BLOBLIST
* smbios: select CONFIG_BLOBLIST
* xilinx: dfu: Fill directly update_info.dfu_string
* cmd: fwu: Dump custom fields from mdata structure
* board: remove capsule update support in set_dfu_alt_info()
Ramon has been inactive on the U-Boot mailing list for over a year now and
the DB410c port has not been updated much lately. I've been doing most of
the DB410c-specific fixes/rework lately and try to test it every now and
then, so add myself as new maintainer. Also add Sam as reviewer, since he's
been doing lots of testing and reviews for MSM8916 recently.
Cc: Sam Day <me@samcday.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-13-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Simplify the board code by using the new BUTTON_CMD functionality, instead
of implementing this separately using C code. This allows disabling or
customizing this functionality if wanted.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-12-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The U-Boot port for DB410c still has plenty of extra space available at
this point, so avoid disabling features that would be normally enabled by
default. In particular, this incldues support for Android boot images,
which is quite likely to be used together with the USB Fastboot interface.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-11-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reduce the environment size by using standard boot instead of distro boot.
It uses faster bootdevs first by default (eMMC -> SD -> USB -> Network), so
set "boot_targets" to keep the current ordering (USB -> SD -> eMMC ->
Network). Perhaps this should be changed for consistency, but for now this
keeps the behavior similar to before.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-10-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The Geniatech DB4 V3 [1] has a RTL8152 onboard for Ethernet. I don't have
one to test if that works, but the other USB Ethernet drivers work pretty
much as-is, so just enable it with the assumption it will work out fine.
[1]: https://www.96boards.org/product/db4/
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-9-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The actual counter frequency is 19.2 MHz, not 19.0 MHz. This isn't really
used so far though, since probably no one (except me) ever tried using
U-Boot in EL3 where we need to program the counter frequency.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-8-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The generic Qualcomm board code allocates addresses for loading the kernel,
ramdisk, DT, fastboot etc. This also happens on the DB410c and already
overrides these definitions defined in the default env. So let's just drop
the static ones, since the dynamic ones work just fine.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-7-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This does not seem to be used anywhere.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-6-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This is broken ever since we switched to using U-Boot as first stage
bootloader. Since no one seems to test this actively, let's just drop this
entirely. There are other tools available for re-flashing the DB410c.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-5-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This was originally taken from Linux, but at this point it's an inline
function upstream and no longer a macro. Given that we just want to extract
the serial number from the MMC CID, let's just inline that specifically.
This is also the style used in the MMC core code within U-Boot.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-4-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
local-bd-address in the device tree needs to be formatted with the least
significant byte first (i.e. little endian). We're not doing this when
adding it to the DT, which means the MAC address ends up being reversed in
Linux. Fix this by reversing the array before setting it in the DT.
We're also flipping the wrong bit when generating the BD address. Before
reversing the array, the least significant bit is in the last byte.
Fixes: ff06dc2403 ("db410: alter WLAN/BT MAC address fixup")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-3-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
DB410c has exactly 1 GiB of RAM. Some of it is reserved, but this is
described separately in the DT.
This was fixed before in commit 1d667227ea ("board: dragonboard410c: Fix
PHYS_SDRAM_1_SIZE"), but was reintroduced when DB410c was converted to use
the upstream device tree.
Note that there are variants of apq8016-sbc with 2 GiB RAM (e.g. the
Geniatech DB4). They need the WIP SMEM memory map parsing [1] to use the
full amount of RAM.
[1]: https://lore.kernel.org/u-boot/20241124-b4-modernise-smem-v1-0-b7852c11b67c@linaro.org/T/
Fixes: ed8fbd2889 ("dts: msm8916: replace with upstream DTS")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-2-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The workaround for the "PSCI bug" on DragonBoard 410c implemented in
arch/arm/mach-snapdragon/include/mach/boot0.h clobbers the x0 register
by storing the CurrentEL in there. When running in EL1, the mode switch
sequence implemented there later clears the register again, but this is
skipped when U-Boot is booted in EL2.
This causes crashes in the mach-snapdragon board_fdt_blob_setup() later,
because the invalid address stored in x0 gets dereferenced to check if it
points to a valid DTB.
We can't rely on having a valid values in the CPU registers for the first
stage bootloader configuration on DB410c, and nothing would place a DTB
there anyway. Skip selecting the SAVE_PREV_BL_FDT_ADDR option for the boot0
hook case to avoid crashing with the clobbered register value.
Fixes: 059d526af3 ("mach-snapdragon: generalise board support")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-1-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Some Qualcomm boards feature reserved ranges of pins which are protected
by firmware. Attempting to read or write any registers associated with
these pins results the board resetting.
Add support for parsing these ranges from devicetree and ensure that the
pinctrl and GPIO drivers don't try to interact with these pins.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250410-topic-sm8x50-pinctrl-reserved-ranges-v2-1-654488392b9a@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This function is already doing a fuzzy match, since there are no
guarantees that a given label is unique.
Ignoring case makes it much easier to catch "Volume down" or "Volume
Down" in board-agnostic code.
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-6-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Boards using gpio-keys for volume buttons label them "Volume Down",
let's match that here, and make the power button nicer too.
This simplifies configuring button_cmds in a board-agnostic way.
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-5-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add some documentation which attempts to describe Qualcomm smartphone
support with the qcom-phone.config fragment, as well as a high level
debugging guide for diagnosing U-Boot issues when UART and framebuffer
are unavailable.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-4-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
To enable more complex sequencing of the bootmenu, autoboot, and
bootretry, handle changes to the bootretry variable between tries. This
makes it possible to turn bootretry off (e.g. to drop to a shell) and
then back on again.
This makes it possible to have a persistent bootmenu (the only way to
navigate U-Boot on devices like smartphones which lack a physical
keyboard) by having bootcmd be defined to launch the bootmenu. This
allows for menu options like enabling USB mass storage gadget to return
back to the boot menu once the gadget is shut down.
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-3-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Introduce a new config option: RETRY_BOOTCMD. When enabled this causes
hush shell to re-run "bootcmd" when the auto-boot counter times out.
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-2-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Phones don't have keyboards! Introduce a phone-specific config fragment
and associated environment file to make U-Boot more useful on these
devices. This allows for navigating via the buttons and enabling
various USB gadget modes or displaying info about U-Boot.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-1-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.
Correct pin configuration is required for working debug UART
and eMMC/SD cards.
SDM630 and SDM660 TLMM blocks are the same.
Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250331155531.3638165-1-alexeymin@postmarketos.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
When a special pin is output only, the current code would return 0,
but if the pin is output only we can get the output value.
Try to return the output value and in all the other cases return
an error instead of 0.
Fixes: f9bb539460 ("gpio: msm: add support for special pins")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250401-topic-sm8x50-msm-gpio-special-fixes-v1-2-a1148a02bb16@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The get_function callback wrongly returns 0 for special pins,
return the appropriate pin function by probing into the special
pins data fields to find if the pin is gpio capable.
Fixes: f9bb539460 ("gpio: msm: add support for special pins")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250401-topic-sm8x50-msm-gpio-special-fixes-v1-1-a1148a02bb16@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add a common RAUC boot logic environment and make use of it in the
i.MX93 environment. The RAUC boot logic is deactivated by default and
can be activated by setting "doraucboot" to "1".
Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Reviewed-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Move the default bootcmd from the defconfig to the board environment in
preparation for RAUC support. No change in functionality.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Add support for disabling external environment import (bootenv.txt) by
setting the ${no_bootenv} environment variable.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Add prepare_mcore script to environment to be able to notify Linux about
the state of M33 core via the kernel cmdline by appending to ${optargs}.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Move the load addresses for FDTs and bootenv.txt to create space for
loading OS image. Otherwise, parts of the image might get corrupted.
and the following boot error will be present:
ERROR: FDT image overlaps OS image (OS=80400000..832a0000)
Moreover, this commit also syncs addresses with downstream PHYTEC
u-boot for i.MX93 in preparation for FIT image support in the future.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Because we've already returned early in the event 'handle' is NULL we
don't need these extra not NULL checks. Remove them
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit 53d5a22163 ("emulation: Use bloblist to hold tables")
`make qemu-riscv64_smode_defconfig acpi.config && make` fails with
drivers/misc/qfw_smbios.c:93:(.text.qfw_evt_write_smbios_tables+0xe):
undefined reference to `bloblist_add'
Build with bloblist support.
Fixes: 53d5a22163 ("emulation: Use bloblist to hold tables")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit 53d5a22163 ("emulation: Use bloblist to hold tables")
`make qemu-riscv64_smode_defconfig acpi.config && make` fails with
qfw_acpi.c:146:(.text.evt_write_acpi_tables+0xc):
undefined reference to `bloblist_add'
Build with bloblist support.
Fixes: 53d5a22163 ("emulation: Use bloblist to hold tables")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
