Commit graph

4458 commits

Author SHA1 Message Date
Simon Glass
557767f802 x86: Add a cpuid command
It is useful to obtain the results of cpuid queries, so add a command
for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18 14:10:21 -06:00
Simon Glass
112eb85c5a video: Allow querying the font size
All the font size to be queried using the 'font size' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18 14:10:21 -06:00
Tom Rini
f8fe853a8d First set of u-boot-at91 fixes for the 2025.01 cycle
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Merge tag 'u-boot-at91-fixes-2025.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 fixes for the 2025.01 cycle:

This small set includes the maintainer e-mail update and a missing
header that was causing some build issues.
2024-10-18 09:04:20 -06:00
Ken Kurematsu
8ac96c25e4 doc: blkmap: Fix typo in command example
Fixed a variable that was incorrect during the calculation of fileblks.

Signed-off-by: Ken Kurematsu <k.kurematsu@nskint.co.jp>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-10-18 16:17:28 +02:00
Chintan Vankar
4b5750aaee doc: board: ti: am62x_sk: Add document for Ethernet boot on AM62x SoC.
Document the procedure to enable Ethernet Boot on AM62x SoC.

Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-10-18 16:17:28 +02:00
Marek Vasut
8efc954fc7 Makefile: Drop SPL_FIT_SOURCE support
The SPL_FIT_SOURCE is long superseded by SPL_FIT_GENERATOR which
is long superseded by binman, drop SPL_FIT_SOURCE support as there
are no more users.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2024-10-17 08:36:10 -06:00
Tom Rini
be708572c2 - stm32mp: fix boot issue with OP-TEE
- stm32mp: Add script to install U-Boot from SD/eMMC to SPI NOR on DH STM32MP15xx
 - stm32mp: Switch to using upstream DT on DH STM32 DHSOM
 - stm32mp: Generate u-boot.itb using binman on DH STM32 DHSOM
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Merge tag 'u-boot-stm32-20241017' of https://source.denx.de/u-boot/custodians/u-boot-stm

CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/22732

- stm32mp: fix boot issue with OP-TEE
- stm32mp: Add script to install U-Boot from SD/eMMC to SPI NOR on DH STM32MP15xx
- stm32mp: Switch to using upstream DT on DH STM32 DHSOM
- stm32mp: Generate u-boot.itb using binman on DH STM32 DHSOM
2024-10-17 08:35:29 -06:00
Sebastian Reichel
1db4c0ac77 usb: tcpm: add core framework
This adds TCPM framework in preparation for fusb302 support, which can
handle USB power delivery messages. This is needed to solve issues with
devices, that are running from a USB-C port supporting USB-PD, but not
having a battery.

Such a device currently boots to the kernel without interacting with
the power-supply at all. If there are no USB-PD message replies within
5 seconds, the power-supply assumes the peripheral is not capable of
USB-PD. It usually takes more than 5 seconds for the system to reach
the kernel and probe the I2C based fusb302 chip driver. Thus the
system always runs into this state. The power-supply's solution to
fix this error state is a hard reset, which involves removing the
power from VBUS. Boards without a battery (or huge capacitors) will
reset at this point resulting in a boot loop.

This imports the TCPM framework from the kernel. The porting has
originally been done by Rockchip using hardware timers and the Linux
kernel's TCPM code from some years ago.

I had a look at upgrading to the latest TCPM kernel code, but that
beast became a lot more complex due to adding more USB-C features.
I believe these features are not needed in U-Boot and with multiple
kthreads and hrtimers being involved it is non-trivial to port them.
Instead I worked on stripping down features from the Rockchip port
to an even more basic level. Also the TCPM code has been reworked
to avoid complete use of any timers (Rockchip used SoC specific
hardware timers + IRQ to implement delayed work mechanism). Instead
the delayed state changes are handled directly from the poll loop.

Note, that (in contrast to the original Rockchip port) the state
machine has the same hard reset quirk, that the kernel has - i.e.
it avoids disabling the CC pin resistors for devices that are not
self-powered. Without that quirk, the Radxa Rock 5B will not just
end up doing a machine reset when a hard reset is triggered, but will
not even recover, because the CPU will loose power and the FUSB302
will keep this state because of leak voltage arriving through the RX
serial pin (assuming a serial adapter is connected).

This also includes a 'tcpm' command, which can be used to get
information about the current state and the negotiated voltage
and current.

Co-developed-by: Wang Jie <dave.wang@rock-chips.com>
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Tested-by: Soeren Moch <smoch@web.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2024-10-17 03:12:47 +02:00
Patrick Delaunay
4ce39923ee doc: clarify scmi device tree for stm32mp15 boards
Clarify the usage of SCMI specific device tree to use with
stm32mp15_defconfig and with OP-TEE.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-10-16 20:18:56 +02:00
Eugen Hristev
274bc1e6bd .mailmap: update e-mail address for Eugen Hristev
Update e-mail address.

Signed-off-by: Eugen Hristev <eugen.hristev@linaro.org>
2024-10-16 15:33:23 +03:00
Tom Rini
d5cab0d6ad Revert "Makefile: Drop SPL_FIT_GENERATOR / SPL_FIT_SOURCE support" changes
:hile we had hoped to be able to remove these options finally, it was
missed that zynq still requires these currently.

This reverts commit 5b9261fb0b and
commit 099b6df556.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-15 20:35:07 -06:00
Marek Vasut
5b9261fb0b Makefile: Drop SPL_FIT_GENERATOR support
The SPL_FIT_GENERATOR is long superseded by binman, drop SPL_FIT_GENERATOR
support as there are no more users.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-15 12:30:07 -06:00
Marek Vasut
099b6df556 Makefile: Drop SPL_FIT_SOURCE support
The SPL_FIT_SOURCE is long superseded by SPL_FIT_GENERATOR which
is long superseded by binman, drop SPL_FIT_SOURCE support as there
are no more users.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2024-10-15 12:30:07 -06:00
Martyn Welch
3809fd35a5 bootstd: Add command to enable setting of bootmeth specific properties
We have previously added logic to allow a "fallback" option to be
specified in the extlinux configuration. Provide a command that allows
us to set this as the preferred default option when booting.

Combined with the bootcount functionality, this allows the "altbootcmd"
to provide a means of falling back to a previously known good state
after a failed update. For example, if "bootcmd" is set to:

    bootflow scan -lb

We would set "altbootcmd" to:

    bootmeth set extlinux fallback 1; bootflow scan -lb

Causing the boot process to boot from the fallback option.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2024-10-15 10:24:27 -06:00
Martyn Welch
d2faad3ff3 boot: pxe_utils: Add fallback support
When configured correctly, we can detect when boot fails after the boot
process has been handed over to the kernel through the use of U-Boot's
bootcount support. In some instances, such as when we are performing
atomic updates via a system such as OSTree, it is desirable to provide a
fallback option so that we can return to a previous (hopefully working)
state.

Add a "fallback" option to the supported extlinux configuration options
that points to a label like "default" so that we can utilise this in
later commits.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-15 10:24:27 -06:00
Neil Armstrong
12ea40d29d ARM: meson: add support for Libre Computer aml-s905d3-cc
Add support for the Libre Computer aml-s905d3-cc "Solitude" board:
https://libre.computer/products/aml-s905d3-cc/

The Solitude board has a Credit Card form factor, similar to the
the previous "Le Potato" card, but with the Amlogic A311D SoC,
MIPI DSI and CSI connectors. PoE header and a single USB2 Type-C
connector replacing the microUSB one for power and USB 2.0.

The board has an embedded SPI NOR flash, and EFI Capsule support
is added.

The GUID is dynamically generated for the board, to get it:
=> efidebug capsule esrt
========================================
ESRT: fw_resource_count=1
ESRT: fw_resource_count_max=1
ESRT: fw_resource_version=1
[entry 0]==============================
ESRT: fw_class=4302C3CB-2502-5EFE-87E0-894A8A322893
ESRT: fw_type=unknown
ESRT: fw_version=0
ESRT: lowest_supported_fw_version=0
ESRT: capsule_flags=0
ESRT: last_attempt_version=0
ESRT: last_attempt_status=success
========================================

On the host (with the aml_encrypt_g12a result binary):
$ eficapsule --guid 4302C3CB-2502-5EFE-87E0-894A8A322893 -i 1 u-boot.bin u-boot.cap

On the board (from USB disk containing u-boot.cap at root):
=> load usb 0:1 $kernel_addr_r u-boot.cap
=> efidebug capsule update $kernel_addr_r

The binary will then be flashed on the SPI.

Link: https://lore.kernel.org/r/20240920-u-boot-topic-libre-computer-solitude-alta-v1-2-8915b108840b@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14 09:06:16 +02:00
Neil Armstrong
9e6e6b034b ARM: meson: add support for Libre Computer aml-a311d-cc
Add support for the Libre Computer aml-a311d-cc "Alta" board:
https://libre.computer/products/aml-a311d-cc/

The Alta board has a Credit Card form factor, similar to the
the prvevious "Le Potato" card, but with the Amlogic A311D SoC,
MIPI DSI and CSI connectors. PoE header and a single USB2 Type-C
connector replacing the microUSB one for power and USB 2.0.

The board has an embedded SPI NOR flash, and EFI Capsule support
is added.

The GUID is dynamically generated for the board, to get it:
=> efidebug capsule esrt
========================================
ESRT: fw_resource_count=1
ESRT: fw_resource_count_max=1
ESRT: fw_resource_version=1
[entry 0]==============================
ESRT: fw_class=17E07D9D-4D91-53F4-8780-1D91F279C1A5
ESRT: fw_type=unknown
ESRT: fw_version=0
ESRT: lowest_supported_fw_version=0
ESRT: capsule_flags=0
ESRT: last_attempt_version=0
ESRT: last_attempt_status=success
========================================

On the host (with the aml_encrypt_g12a result binary):
$ eficapsule --guid 17E07D9D-4D91-53F4-8780-1D91F279C1A5 -i 1 u-boot.bin u-boot.cap

On the board (from USB disk containing u-boot.cap at root):
=> load usb 0:1 $kernel_addr_r u-boot.cap
=> efidebug capsule update $kernel_addr_r

The binary will then be flashed on the SPI.

Link: https://lore.kernel.org/r/20240920-u-boot-topic-libre-computer-solitude-alta-v1-1-8915b108840b@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14 09:06:16 +02:00
Tom Rini
82686e678e Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-13 10:43:24 -06:00
Svyatoslav Ryhel
8768ade2b5 board: asus: transformer: implement multi-DTB support
Use board revision detection mechanism to choose correct DTB.
Adjust documentation and build setup accordingly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:03 +03:00
Svyatoslav Ryhel
1c1608e0c7 board: asus: grouper: implement multi-DTB support
Use board revision detection mechanism to choose correct DTB.
Adjust documentation and build setup accordingly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Tom Rini
47e544f576 Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"
Simon Glass <sjg@chromium.org> says:

When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL

Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.

For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:

   #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)

In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.

This series starts a change in terminology and usage to resolve the
above issues:

- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
  'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
  defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_

It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.

This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.

The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
2024-10-11 12:23:25 -06:00
Simon Glass
c46760d596 global: Rename SPL_ to XPL_
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
1d6132e2a2 global: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Complete this rename for all directories outside arch/ board/ drivers/
and include/

Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
ac644df9a4 doc: Update init docs for the xPL changes
Update the documentation here to cover the meaning of xPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
64746bfdff doc: Move init-related things out of README
Move this section to rst, changing it just enough so that it builds.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
e16bfd9e58 doc: Update SPL docs for the xPL changes
Update the various references to SPL in this document. Make sure to
refer to 'phases' instead of 'stages', which is not a U-Boot term.

Fix a few U-boot typos and try to improve grammar a little while we are
here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
a64e7d73d6 log: global: Rename warn_non_spl()
This should now refer to xPL rather than SPL, so update it throughout
the tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
456bdb70de xpl: Rename spl_phase() to xpl_phase()
Rename this function to indicate that it refers to any xPL phase.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
41ea75aa00 xpl: Rename spl_phase to xpl_phase_t
This name fits better with the new naming scheme, so update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Tom Rini
c264a5940e Merge patch series "led: introduce LED boot and activity function"
Christian Marangi <ansuelsmth@gmail.com> says:

This series is a reworked version of the previous seried:
misc: introduce STATUS LED activity function

This series port and expand the legacy concept of LED boot from
the legacy Status LED API to new LED API.

One thing that many device need is a way to communicate to the
user that the device is actually doing something.

This is especially useful for recovery steps where an
user (for example) insert an USB drive, keep a button pressed
and the device autorecover.

There is currently no way to signal the user externally that
the bootloader is processing/recoverying aside from setting
a LED on.

A solid LED on is not enough and won't actually signal any
kind of progress.
Solution is the good old blinking LED but uboot doesn't
suggest (and support) interrupts and almost all the LED
are usually GPIO LED that doesn't support HW blink.

Additional Kconfg are also introduced to set the LED boot and
activity. Those are referenced by label.

A documentation for old and these new LED API is created.
2024-10-10 16:02:37 -06:00
Christian Marangi
051c448c8b doc: introduce led.rst documentation
Introduce simple led.rst documentation to document all the additional
Kconfig and the current limitation of LED_BLINK and GPIO software blink.

Also add missing definition for sw_blink in led_uc_plat struct.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-10 16:02:20 -06:00
Simon Glass
6fe80876dc efi_loader: Rename and move CMD_BOOTEFI_HELLO_COMPILE
This is not actually a command so the name is confusing. Use
BOOTEFI_HELLO_COMPILE instead. Put it in the efi_loader directory
with the other such config options.

The link rule (for $(obj)/%_efi.so) in scripts/Makefile.lib handles
pulling in efi_crt0.o and efi_reloc.o so drop the 'extra' rules.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-09 22:04:56 -06:00
Simon Glass
77a93ae681 doc: Move the generic memory-documentation to doc/
Move this section of the README into doc/ with some minor updates to
mention SPL and user lower-case hex.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-10-09 22:04:56 -06:00
Tom Rini
c530f6079c Merge branch 'next' 2024-10-07 09:06:49 -06:00
Tom Rini
f919c3a889 Prepare v2024.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-07 08:54:35 -06:00
Peter Robinson
af69289d61 Update directories for new name of TF-A directories
The TF-A URL was updated, as a result the name of the
directory changed as part of the new git URL and not
all the referenced directories were updated.

Fixes: 0ec0207fe0 ("Update the ARM trusted firmware git URL")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2024-10-04 09:00:47 -06:00
Tom Rini
08990e2254 Merge patch series "arm: Initial support for Analog Devices SC5xx boards"
Oliver Gaskell <Oliver.Gaskell@analog.com> says:

ADSP-SC5xx is a series of ARM-based DSPs.
This comprises the armv7 based SC57x, SC58x and SC594 series, and the
armv8 based SC598.

This patch series includes configurations, init code, and minimal DTs
to enable Analog Devices' evaluation boards for these SoCs to boot
through SPL and into U-Boot Proper, as well as devicetree schemas for
the added DTs.

This patch series depends on ("arm: Add Analog Devices SC5xx Machine
Type") (https://lists.denx.de/pipermail/u-boot/2024-April/552043.html)
2024-10-03 09:30:37 -06:00
Oliver Gaskell
3e724aab2f dt-bindings: timer: Add SC5xx Timer bindings
Add devicetree schema for the timer peripheral on Analog Devices SC5xx
series SoCs.

Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
2024-10-03 09:29:22 -06:00
Oliver Gaskell
cc522cc6ed dt-bindings: clock: Add SC5xx clock tree bindings
Add devicetree schema for the clock tree on Analog Devices SC5xx series
SoCs.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
2024-10-03 09:29:22 -06:00
Oliver Gaskell
ff464f904d dt-bindings: arm: Add SC5xx Series binding
Add devicetree schema for Analog Devices SC5xx series SoCs.

Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
2024-10-03 09:29:22 -06:00
Peter Robinson
0ec0207fe0 Update the ARM trusted firmware git URL
The primary upstream URL for tf-a has moved, in some cases
things like tags are not always pushed to the old URL so
update the URLs to the primary upstream project URL.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2024-10-03 09:08:29 -06:00
Tom Rini
2e8dfef46c Merge patch series "Add Android 14 bootflow support for AM62X and AM62P board"
Guillaume La Roque <glaroque@baylibre.com> says:

Ths patchset add support of Android 14 with boot image version 4
for :
- AM62X-SK EVM: https://www.ti.com/tool/SK-AM62B
- BeaglePlay: https://beagleplay.org/
- AM62PX-SK EVM: https://www.ti.com/tool/SK-AM62P-LP

Android Images use to test this series are on the Official TI website:
- AM62x/BeaglePlay: https://www.ti.com/tool/PROCESSOR-SDK-AM62X
- AM62PX: https://www.ti.com/tool/PROCESSOR-SDK-AM62P
2024-10-02 13:34:35 -06:00
Guillaume La Roque
0be5309ee4 board: ti: am62x_evm: Add android bootflow
Add Android bootflow support for AM62X SK EVM board with
new android boot method.

To build for AM62x for Android, we use the
am62x_a53_android.config fragment when building A53 bootloaders:

  $ make am62x_evm_a53_defconfig
  $ make am62x_a53_android.config
  $ make

Co-developed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2024-10-02 13:33:53 -06:00
Tom Rini
3a0b829efc Prepare v2024.10-rc6
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Merge tag 'v2024.10-rc6' into next

Prepare v2024.10-rc6
2024-09-30 17:48:12 -06:00
Tom Rini
9cfe0cab3b Prepare v2024.10-rc6
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-09-30 16:47:28 -06:00
Thomas Perrot
7803a66399 doc: usage: cmd: ums: fix dependencies
Replace CONFIG_USB_USB_GADGET by CONFIG_USB_GADGET_DOWNLOAD.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-09-21 11:22:42 +02:00
Tom Rini
c17805e19b Merge patch series "Fix various bugs"
Simon Glass <sjg@chromium.org> says:

This series includes the patches needed to make make the EFI 'boot' test
work. That test has now been split off into a separate series along with
the EFI patches.

This series fixes these problems:
- sandbox memory-mapping conflict with PCI
- the fix for that causes the mbr test to crash as it sets up pointers
  instead of addresses for its 'mmc' commands
- the mmc and read commands which cast addresses to pointers
- a tricky bug to do with USB keyboard and stdio
- a few other minor things
2024-09-18 13:07:19 -06:00
Simon Glass
df2c5941a6 sandbox: Change the range used for memory-mapping tags
Sandbox keeps a table of addresses which map to pointers which are
outside its emulated DRAM. The current range from 10000000 conflicts
with the PCI range, meaning that if PCI mapping is on, that particular
address can be decoded by PCI instead of the table.

Fix this by moving the range up to the top of memory. Update the docs
while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-09-18 13:01:00 -06:00
Tomas Paukrt
6c0943ff54 cmd: mmc: Allow using partition name in mmc erase command
The mmc erase command currently requires blk# and cnt parameters
which can be obtained using the part start and part size commands
if the entire partition needs to be erased.

Simplify the use of the mmc erase command by allowing the partition
name to be specified directly.

Signed-off-by: Tomas Paukrt <tomaspaukrt@email.cz>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-09-16 16:45:55 -06:00
Tom Rini
19dbc09405 Prepare v2024.10-rc5
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Merge tag 'v2024.10-rc5' into next

Prepare v2024.10-rc5
2024-09-16 14:48:13 -06:00