Commit graph

278 commits

Author SHA1 Message Date
Primoz Fiser
4c0d377858 board: phytec: common: Fix phytec_get_product_name()
Currently, phytec_get_product_name() function only takes care of PCM
SoM type, however in case of PCL, KSM or KSP SoM type it will return
error:

  phytec_get_product_name: Invalid SOM type

Add support for other SoM types as defined in phytec_som_type_str enum
(see phytec_som_detection.h) to get rid of the error.

While at it, also simplify switch case statements by grouping them
together. This makes it more concise and readable.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
2025-04-15 11:55:17 -06:00
Tom Rini
295376ce8a Merge tag 'u-boot-imx-master-20250411' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25652

- Add i.MX8MP LDB support.
- Various phycore-imx93 environment improvements.
- Add support for Toradex SMARC iMX8MP.
2025-04-11 09:11:38 -06:00
Martin Schwan
ba71e4ef4d board: phycore-imx93: env: Add common RAUC boot logic
Add a common RAUC boot logic environment and make use of it in the
i.MX93 environment. The RAUC boot logic is deactivated by default and
can be activated by setting "doraucboot" to "1".

Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Reviewed-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-04-11 10:00:59 -03:00
Leonard Anderweit
90209b16d6 board: phycore-imx93: env: Move bootcmd from defconfig to env
Move the default bootcmd from the defconfig to the board environment in
preparation for RAUC support. No change in functionality.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-04-11 10:00:59 -03:00
Primoz Fiser
82211629c6 board: phycore-imx93: env: Add option to disable bootenv.txt import
Add support for disabling external environment import (bootenv.txt) by
setting the ${no_bootenv} environment variable.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-04-11 10:00:59 -03:00
Primoz Fiser
e1d68ed3e2 board: phycore-imx93: env: Add prepare_mcore to environment
Add prepare_mcore script to environment to be able to notify Linux about
the state of M33 core via the kernel cmdline by appending to ${optargs}.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-04-11 10:00:58 -03:00
Primoz Fiser
f7d7eaa573 board: phycore-imx93: env: Add optargs to environment
Add the optargs variable so we can set optional arguments while booting.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-04-11 10:00:58 -03:00
Primoz Fiser
a2a55965b1 board: phycore-imx93: env: Move fdt and bootenv addresses
Move the load addresses for FDTs and bootenv.txt to create space for
loading OS image. Otherwise, parts of the image might get corrupted.
and the following boot error will be present:

  ERROR: FDT image overlaps OS image (OS=80400000..832a0000)

Moreover, this commit also syncs addresses with downstream PHYTEC
u-boot for i.MX93 in preparation for FIT image support in the future.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-04-11 10:00:58 -03:00
Jonathan Humphreys
6f7fb8d29f board: remove capsule update support in set_dfu_alt_info()
Now that capsule update sets the dfu_alt_info environment variable
explicitly, there is no need to support it in the set_dfu_alt_info()
function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWARE_FIT and
EFI_CAPSULE_FIRMWARE_RAW. For many boards, this was the only use of
set_dfu_alt_info() so remove the function entirely.

Fixes: a9e6f01a94 ("efi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # for board/libre-computer/*
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de> # for
2025-04-11 13:20:37 +02:00
Tom Rini
cb7555e930 Merge patch series "*** Add Ethernet boot support for AM62Ax + phyCORE-AM62 SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:

Add general ethernet boot support for AM62Ax SoC.
Some of the work is based on TI's downstream u-boot patches found in
[1], patches touching code in mach-k3 and *.yaml board config files.

Also, provide defconfigs and device tree changes for phyCORE-AM62x and
phyCORE-AM62Ax to support booting via ethernet.

[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1307981/sk-am62a-lp-rgmii-boot-mode-problem

Link: https://lore.kernel.org/r/20250325035824.2304200-1-w.egorov@phytec.de
2025-04-10 15:04:09 -06:00
Wadim Egorov
e41c21acce configs: Add phycore_am62ax_r5_ethboot_defconfig
Provide a defconfig for booting the phycore-am62ax via Ethernet.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Nathan Morrisson
5327b62c12 board: phytec: phycore_am62ax: Share ethernet resources with boot r5 core
During the U-Boot SPL R5 boot stage the code is running on the MAIN R5
core, which means a host ID of 36 is used for DM/TIFS communication,
see [1]. In order to enable Ethernet boot update the DMA resources used
to be shared with the MAIN R5 core instead of the MCU R5 core.

[1] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am62ax/hosts.html

Based on patch 19 from https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1307981/sk-am62a-lp-rgmii-boot-mode-problem

Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Wadim Egorov
1acffb5711 configs: Add phycore_am62x_r5_ethboot_defconfig
Provide a defconfig for booting the phycore-am62x via Ethernet.
We need a separate defconfig because the AM62x has not enough internal
SRAM to support all boot sources.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Tom Rini
ee82a5a0ed phycore_imx8mp: Rework some of the RAM related Kconfig symbols
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case we can easily fix this
by dropping the select line as the following choice statement handles
things correctly. We also drop the "default false" line as false / n is
the default.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
2025-03-19 13:19:50 -03:00
Tom Rini
c342f27711 Merge patch series "*** Various Improvements for phyCORE-AM62/A SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:

This patch series syncs the phyCORE-AM62Ax feature-wise with our other
K3-based SoMs by adding SoM overlay handling and capsule updates. It
also introduces support for USBDFU boot and includes various minor fixes.

Link: https://lore.kernel.org/r/20250305045838.3614661-1-w.egorov@phytec.de
2025-03-18 09:04:06 -06:00
Daniel Schultz
1afc1a7401 board: phytec: common: Add phyCORE-AM62Ax
Add the phyCORE-AM62Ax to our common board directory to
enable our SOM detection for this product.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:53 -06:00
Wadim Egorov
cc5c55567e board: phytec: common: k3: Make configure_capsule_updates() static
This function is only used in the board.c file. Make it static.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:53 -06:00
Wadim Egorov
d78bc6ea9f board: phytec: phycore_am62ax: Add Network/SPI/DFU env variables
Include the boot logic to boot via Network, from a OSPI/QSPI
NOR flash or via USB DFU.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:53 -06:00
Wadim Egorov
7719682164 board: phytec: phycore_am62x: Use custom k3_dfu.env fragment
TI's k3_dfu.env includes redundant dfu_alt_info_* data, some of which
is incompatible with our board configuration. Replace it with a custom
variant that better aligns with our setup, ensuring correct offsets and
eliminating unnecessary entries.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:53 -06:00
Wadim Egorov
adf4d5e9e8 configs: Add phycore_am62ax_r5_usbdfu_defconfig
This config includes the phycore_am62ax_r5_defconfig file as well as
the am62x_r5_usbdfu.config fragment. We need another defconfig
because the AM62Ax has not enough internal SRAM to support all boot
sources. The normal phycore_am62ax_r5_defconfig should allow to boot
from MMC and OSPI while this new defconfig allows to boot from USB.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:53 -06:00
Wadim Egorov
2708c0b23f doc: phytec: k3: Add a common part for Environment and EFI Capsules
Provide a common part for our K3 based boards including general details
about environment handling and EFI capsule updates.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:52 -06:00
Daniel Schultz
552c062901 board: Phytec: phycore_am62x: Increase size for Image in SPI
Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-02-20 16:13:20 -06:00
Daniel Schultz
c78c13fba5 board: Phytec: phycore_am64x: Increase size for Image in SPI
Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-02-20 16:13:20 -06:00
Wadim Egorov
a4287431ad board: phytec: phycore_am64x: Add support for 1 GB RAM variant and ECC
Detect RAM size via EEPROM and adjust DDR size and banks accordingly.
Include necessary fixups to handle ECC-enabled configurations.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
2025-02-10 10:28:05 -06:00
Daniel Schultz
058ed281fa board: phytec: common: k3: Expose product infos to Linux
Call 'phytec_ft_board_fixup' in the common K3 board code
to expose the product name and part number to Linux.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-01-31 11:08:04 -06:00
Daniel Schultz
9c46b8c4e0 board: phytec: common: Add product information to FTD
ft_board_setup inside the board code allows to alter
device-tree during the boot process.

Introduce a new function for the PHYTEC SOM detection
to read the product name and part number from the EEPROM
content and include both into the device-tree as
* phytec,som-part-number
* phytec,som-product-name

This function can be called from the board code when those
values should be exposed to Linux.

This patch also updates the phytec_print_som_info
function and changes the output.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2025-01-31 11:08:04 -06:00
Daniel Schultz
b2a04cd075 board: phytec: common: k3: Add missing boot source to env
We set the boot source as environment variable 'boot'.
Also include 'uart' and 'usbdfu' as possible boot sources.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-01-23 12:11:50 -06:00
Wadim Egorov
86f3c1cc47 board: phytec: phycore-am62x: Add DDR size fixups if ECC is enabled
With commit 22ce56a3eb ("ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc()
to solve 'calculations restricted to 32 bits' issue") we need to provide the
detected RAM size in the device tree node prio to K3 DDRSS driver probe.
This is done by calling fdt_fixup_memory_banks() in do_board_detect().

After probing, call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.

A third fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-01-23 12:11:50 -06:00
Leonard Anderweit
e38a490810 phycore-imx8mp: Enable CAAM in spl
Enable CAAM in spl.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
2025-01-20 08:41:38 -03:00
Yannic Moog
99039271c0 doc: phytec: imx8mm: add OP-TEE documentation
Add instructions on how to build and package OP-TEE for the
phycore-imx8mm based boards. The build instructions are identical for
phyGATE-Tauri-L and phyBOARD-Polis.
Also fix missig '-' for TF-A build instructions.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2025-01-16 10:16:02 -03:00
Tom Rini
5360c683e6 Merge patch series "Add phyCORE AM62Ax"
Garrett Giordano <ggiordano@phytec.com> says:

This patch set adds the phyCORE AM62Ax board support and documenation to
u-boot.

The phyCORE-AM62Ax is a SoM (System on Module) featuring TI's AM62Ax SoC. It can
be used in combination with different carrier boards. This module can come
with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs
from the AM62x family.

A development Kit, called phyBOARD-Lyra is used as a carrier board reference
design around the AM62x SoM.

This series depends on the following two patches:
- [PATCH v2] arm: mach-k3: am62a7: Provide a way to obtain boot device for non SPL
  https://lists.denx.de/pipermail/u-boot/2024-October/570156.html
- [PATCH] board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
  https://lists.denx.de/pipermail/u-boot/2024-November/571543.html

Link: https://lore.kernel.org/r/20241118231606.3161665-1-ggiordano@phytec.com
[trini: Fix warning in board/phytec/common/k3/board.c when
        CONFIG_EFI_HAVE_CAPSULE_SUPPORT is not enabled]
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-13 20:09:41 -06:00
Garrett Giordano
d13e67c24d board: phytec: am62a7: Add PHYTEC phyCORE-AM62A7 SoM
Add support for PHYTEC phyCORE-AM62A7 SoM.

Supported features:
  - 2GB LPDDR4 RAM
  - eMMC
  - External SD
  - Ethernet
  - debug UART

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2024-12-13 17:30:01 -06:00
Tom Rini
7917841b00 Merge patch series "Enable EFI capsule updates for PHYTEC K3 SoMs"
Wadim Egorov <w.egorov@phytec.de> says:

This implements capsule updates for all our K3 SoMs for
eMMC, OSPI NOR and uSD cards.

We can use capsule updates to update the bootloader on all our
supported flash devices.

Link: https://lore.kernel.org/r/20241127121736.1525948-1-w.egorov@phytec.de
2024-12-13 14:15:43 -06:00
Wadim Egorov
f9fc0b7a2e board: phytec: k3: Add EFI capsule update support
Implement EFI capsule update functionality for PHYTEC K3-based SoMs.
These SoMs feature various flash device options, including eMMC,
OSPI NOR, and uSD card at the board level.

This update provides the necessary logic to enable EFI capsule updates
across all three flash devices, ensuring flexible and robust firmware
upgrade capabilities.

The GUID is dynamically generated for the board, to get it:

  efidebug capsule esrt
  ========================================
  ESRT: fw_resource_count=3
  ESRT: fw_resource_count_max=3
  ESRT: fw_resource_version=1
  [entry 0]==============================
  ESRT: fw_class=C7D64D6D-10B2-54BC-A3BF-06A9DC3653D9
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  [entry 1]==============================
  ESRT: fw_class=09841C3F-F177-5D57-B1F6-754D92879205
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  [entry 2]==============================
  ESRT: fw_class=D11A9016-515E-503A-8872-3FF65384D0C4
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  ========================================

On the board (from uSD card containing capsule binaries at boot):

  load mmc 1:1 $loadaddr tiboot3-capsule.bin
  efidebug capsule update $loadaddr

  load mmc 1:1 $loadaddr tispl-capsule.bin
  efidebug capsule update $loadaddr

  load mmc 1:1 $loadaddr uboot-capsule.bin
  efidebug capsule update $loadaddr

The binaries will be flashed to the flash device you are booted from.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-12-13 14:15:31 -06:00
Yunus Bas
6b535ce0fd board: phytec: phycore_imx8mm: Add RAUC boot logic to environment
Add RAUC boot logic to the environment.

Signed-off-by: Yunus Bas <y.bas@phytec.de>
2024-12-07 09:06:32 -03:00
Yunus Bas
867132cf23 phycore_imx8mm: Move default bootcmd to board env
Move the default bootcmd from the defconfig to the board environment.

Signed-off-by: Yunus Bas <y.bas@phytec.de>
2024-12-07 09:06:32 -03:00
Yunus Bas
e2cc259cbb phycore_imx8mm: Switch to using env text files
Move the environment into the board directory and convert header to a
txt file. In addition, this patch also applies following changes:

- Change default nfsroot path to /srv/nfs due to compliance with Linux
FHS 3.0.

- Rename specific variables as stated in the bootstd documentation.
Renamed variables:
	fdt_addr => fdt_addr_r
	fdt_file => fdtfile

Signed-off-by: Yunus Bas <y.bas@phytec.de>
2024-12-07 09:06:32 -03:00
Garrett Giordano
893ae07cc9 board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.

Also enable the feature by default for PHYCORE_AM62X_R5.

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2024-12-04 14:04:08 -06:00
Yunus Bas
a488d9f26e board: phytec: phycore-imx8mm: Add EEPROM detection initialisation
Add EEPROM detection initialisation for phyCORE-i.MX8MM.

Signed-off-by: Yunus Bas <y.bas@phytec.de>
2024-11-25 23:08:24 -03:00
Christoph Stoidner
512c6b67a2 board: phytec: imx93: Add phyCORE-i.MX 93 support for all SOM variants
The phyCORE-i.MX 93 is available in various variants (e.g. different ram
sizes, eMMC HS400 yes/no). Enable hardware introspection for the
imx93-phyboard-segin_defconfig, so that during startup the SOM module
variant can be detected, and the hardware can be configured accordingly.
The resulting SPL and u-boot binary shall able to boot each
phyCORE-i.MX 93 module variant on each carrier board. Finally rename
imx93-phyboard-segin_defconfig to imx93-phycore_defconfig, to highlight
its SOM scope.

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
2024-11-25 23:08:02 -03:00
Christoph Stoidner
d3b9b79968 board: phytec: imx93: Add eeprom-based hardware introspection
The phyCORE-i.MX 93 is available in various variants. Relevant variant
options for the spl/u-boot are:
- with or without HS400 support for the eMMC
- with 1GB ram chip, or 2GB ram chip

The phyCORE's eeprom contains all information about the existing variant
options. Add evaluation of the eeprom data to the spl/u-boot to
enable/disable HS400 and to select the appropriate ram configuration at
startup.

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Primoz Fiser <primoz.fiser@norik.com>
2024-11-25 23:08:02 -03:00
Christoph Stoidner
29d4a73bd0 board: phytec: phycore-imx93: Add 2GB LPDDR4X RAM timings
The phyCORE-i.MX 93 is available with a 1GB ram chip or a 2GB ram chip.
Add the ram timings for the 2GB chip, in form of a diff compared
to the existing LPDDR4X 1GB timings. With that, the SPL can select the
appropriate timings at startup.
Update also the 1GB ram timings with new version of the DDR Tool.

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Tested-by: Primoz Fiser <primoz.fiser@norik.com>
2024-11-25 23:08:02 -03:00
Wadim Egorov
a687070664 board: phytec: common: k3: Apply SoM-specific overlays to OS device tree
Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Neha Malcom Francis <n-francis@ti.com>
2024-11-14 10:46:22 -06:00
Simon Glass
dac3ce976a board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Ye Li
7872a986e5 imx9: clock: Update clock init function and sequence
Since we use SPEED GRADE fuse to set A55 frequency, remove the
set_arm_core_low_drive_clk function which has hard coded frequency.
And adjust clock_init called sequence and split it to early and late
functions.
Set the authen register in early function, because CCF driver checks
NS bit.
Set bus and core clock in late function, because the fuse read and
SoC type/rev depend on ELE.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19 00:12:41 -03:00
Tom Rini
78d898eec0 Merge patch series "phycore-am62/4: Add more boot sources"
Daniel Schultz <d.schultz@phytec.de> says:

This patch stack extends the phyCORE-AM62x/AM64x U-Boot by following boot
sources:

  - Load U-Boot with USB DFU
  - Load a Linux and initramfs from OSPI/QSPI NOR flash
  - Load a Linux and rootfs from Network

Moreover, it adds required changes to the environment to boot an A/B
system with RAUC and includes some minor fixes.
2024-09-10 14:56:12 -06:00
Daniel Schultz
11b8fa0095 board: phytec: phycore_am64x: Add Network/SPI Boot
Include the boot logic to boot via Network or from a OSPI/QSPI
NOR flash. Moreover, set all required variables to both boot
methods to the environment.

Note: The phyBOARD-Electra AM64x is not able to load the U-Boot
via Network. However, it's still possible to load the kernel.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
a48cbaeecb board: phytec: phycore_am62x: Add Network/SPI Boot
Include the boot logic to boot via Network or from a OSPI/QSPI
NOR flash. Moreover, set all required variables to both boot
methods to the environment.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Benjamin Hahn
8412acec95 board: phytec: phycore_imx8mp: Add mtd spi partitions
Depending on if a SPI-NOR flash is populated add the mtd partition
table to the device tree. For this we have to also probe the
flash before booting.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-08-30 15:50:36 -03:00
Yashwanth Varakala
f0f5ab50c2 board: phytec: phycore_imx8mp: Add mcore support
Added m7 core support in uboot for imx8mp by adding
the boot variable prepare_mcore.

Based on commit 0ed32cc8568a ("LF-6555 imx8m[m/n/p/q]_evk: add
bootargs to support mcore")

Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
2024-08-23 14:53:07 -03:00