Merge patch series "*** Various Improvements for phyCORE-AM62/A SoMs ***"

Wadim Egorov <w.egorov@phytec.de> says:

This patch series syncs the phyCORE-AM62Ax feature-wise with our other
K3-based SoMs by adding SoM overlay handling and capsule updates. It
also introduces support for USBDFU boot and includes various minor fixes.

Link: https://lore.kernel.org/r/20250305045838.3614661-1-w.egorov@phytec.de
This commit is contained in:
Tom Rini 2025-03-18 08:14:13 -06:00
commit c342f27711
19 changed files with 243 additions and 5 deletions

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@ -177,6 +177,10 @@
bootph-all;
};
&usb0_phy_ctrl {
bootph-all;
};
&vcc_3v3_mmc {
bootph-all;
};

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@ -142,7 +142,21 @@
};
};
};
#endif
#include "k3-binman-capsule-r5.dtsi"
&capsule_tiboot3 {
efi-capsule {
/*
* The GUID is generated dynamically by taking a namespace UUID and hashing
* it with the board compatible and fw_image name:
* mkeficapsule guidgen k3-am62a7-r5-phycore-som-2gb.dtb PHYCORE_AM62AX_TIBOOT3
*/
image-guid = "07CA7DD0-85FF-597E-A485-B2423D3AE6C1";
};
};
#endif /* CONFIG_TARGET_PHYCORE_AM62AX_R5 */
#ifdef CONFIG_TARGET_PHYCORE_AM62AX_A53
@ -306,6 +320,66 @@
description = "U-Boot for AM62Ax board";
};
som-no-rtc {
description = "k3-am6xx-phycore-disable-rtc";
type = "flat_dt";
compression = "none";
load = <0x8F000000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_rtc_dtbo>;
keyfile = "custMpk.pem";
};
am6xx_phycore_disable_rtc_dtbo: blob-ext {
filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-rtc.dtbo";
};
};
som-no-spi {
description = "k3-am6xx-phycore-disable-spi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F001000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_spi_not_dtbo>;
keyfile = "custMpk.pem";
};
am6xx_phycore_disable_spi_not_dtbo: blob-ext {
filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-spi-nor.dtbo";
};
};
som-no-eth {
description = "k3-am6xx-phycore-disable-eth-phy";
type = "flat_dt";
compression = "none";
load = <0x8F002000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_eth_phy_dtbo>;
keyfile = "custMpk.pem";
};
am6xx_phycore_disable_eth_phy_dtbo: blob-ext {
filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-eth-phy.dtbo";
};
};
som-qspi {
description = "k3-am6xx-phycore-qspi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F003000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_qspi_nor_dtbo>;
keyfile = "custMpk.pem";
};
am6xx_phycore_disable_qspi_nor_dtbo: blob-ext {
filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-qspi-nor.dtbo";
};
};
fdt-0 {
description = "k3-am62a7-phyboard-lyra-rdk";
type = "flat_dt";
@ -330,7 +404,11 @@
conf-0 {
description = "k3-am62a7-phyboard-lyra-rdk";
firmware = "uboot";
loadables = "uboot";
loadables = "uboot",
"som-no-rtc",
"som-no-spi",
"som-no-eth",
"som-qspi";
fdt = "fdt-0";
};
};
@ -451,4 +529,29 @@
};
};
};
#endif
#include "k3-binman-capsule.dtsi"
&capsule_tispl {
efi-capsule {
/*
* The GUID is generated dynamically by taking a namespace UUID and hashing
* it with the board compatible and fw_image name:
* mkeficapsule guidgen k3-am62a7-phyboard-lyra-rdk.dtb PHYCORE_AM62AX_SPL
*/
image-guid = "14F968A2-7C3A-50AD-9356-192F07AD2A9C";
};
};
&capsule_uboot {
efi-capsule {
/*
* The GUID is generated dynamically by taking a namespace UUID and hashing
* it with the board compatible and fw_image name:
* mkeficapsule guidgen k3-am62a7-phyboard-lyra-rdk.dtb PHYCORE_AM62AX_UBOOT
*/
image-guid = "1F1148C5-2785-5E7C-9C58-C5B1EC0DC80C";
};
};
#endif /* CONFIG_TARGET_PHYCORE_AM62AX_A53 */

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@ -239,6 +239,10 @@
bootph-all;
};
&usb0_phy_ctrl {
bootph-all;
};
&vcc_3v3_mmc {
bootph-all;
};

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@ -38,6 +38,17 @@ config PHYTEC_AM62_SOM_DETECTION
Support of I2C EEPROM based SoM detection. Supported
for PHYTEC AM62x boards.
config PHYTEC_AM62A_SOM_DETECTION
bool "Support SoM detection for AM62Ax PHYTEC platforms"
depends on (TARGET_PHYCORE_AM62AX_A53 || TARGET_PHYCORE_AM62AX_R5) && \
PHYTEC_SOM_DETECTION
select SUPPORT_EXTENSION_SCAN
depends on SPL_I2C && DM_I2C
default y
help
Support of I2C EEPROM based SoM detection. Supported
for PHYTEC AM62Ax boards.
config PHYTEC_AM64_SOM_DETECTION
bool "Support SoM detection for AM64x PHYTEC platforms"
depends on (TARGET_PHYCORE_AM64X_A53 || TARGET_PHYCORE_AM64X_R5) && \

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@ -11,10 +11,12 @@
extern struct phytec_eeprom_data eeprom_data;
#if IS_ENABLED(CONFIG_PHYTEC_AM62_SOM_DETECTION) || \
IS_ENABLED(CONFIG_PHYTEC_AM62A_SOM_DETECTION) || \
IS_ENABLED(CONFIG_PHYTEC_AM64_SOM_DETECTION)
/* Check if the SoM is actually one of the following products:
* - phyCORE-AM62x
* - phyCORE-AM62Ax
* - phyCORE-AM64x
*
* Returns 0 in case it's a known SoM. Otherwise, returns -1.
@ -41,6 +43,9 @@ int phytec_am6_detect(struct phytec_eeprom_data *data)
if (som == PHYTEC_AM62X_SOM && soc_is_am62x())
return 0;
if (som == PHYTEC_AM62AX_SOM && soc_is_am62ax())
return 0;
if (som == PHYTEC_AM64X_SOM && soc_is_am64x())
return 0;

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@ -11,6 +11,7 @@
#define EEPROM_ADDR 0x50
#define PHYTEC_AM62X_SOM 71
#define PHYTEC_AM62AX_SOM 75
#define PHYTEC_AM64X_SOM 72
#define PHYTEC_EEPROM_VALUE_X 0x21
#define PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI 0xC

View file

@ -48,7 +48,7 @@ struct efi_capsule_update_info update_info = {
* Note: Currently, eMMC hardware partitions are not differentiated; Updates
* are always applied to the first boot partition.
*/
void configure_capsule_updates(void)
static void configure_capsule_updates(void)
{
static char dfu_string[128] = { 0 };
const char *dfu_raw = "tiboot3.bin raw 0x0 0x400 mmcpart 1;"

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@ -10,5 +10,6 @@ F: arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts
F: board/phytec/phycore_am62ax/
F: configs/phycore_am62ax_a53_defconfig
F: configs/phycore_am62ax_r5_defconfig
F: configs/phycore_am62ax_r5_usbdfu_defconfig
F: include/configs/phycore_am62ax.h
F: doc/board/phytec/phycore-am62ax.rst

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@ -1,3 +1,8 @@
#include <env/phytec/k3_dfu.env>
#include <env/phytec/k3_mmc.env>
#include <env/phytec/k3_net.env>
#include <env/phytec/k3_spi.env>
fdtaddr=0x88000000
loadaddr=0x82000000
scriptaddr=0x80000000
@ -12,3 +17,9 @@ mmcroot=2
mmcpart=1
console=ttyS2,115200n8
earlycon=ns16550a,mmio32,0x02800000
get_cmd=tftp
spi_fdt_addr=0x700000
spi_image_addr=0x800000
spi_ramdisk_addr=0x1e00000

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@ -12,4 +12,5 @@ F: configs/phycore_am62x_r5_defconfig
F: configs/phycore_am62x_r5_usbdfu_defconfig
F: include/configs/phycore_am62x.h
F: doc/board/phytec/phycore-am62x.rst
F: doc/board/phytec/k3-common.rst
F: board/phytec/common/k3

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@ -1,4 +1,4 @@
#include <env/ti/k3_dfu.env>
#include <env/phytec/k3_dfu.env>
#include <env/phytec/k3_mmc.env>
#include <env/phytec/k3_net.env>
#include <env/phytec/k3_spi.env>

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@ -35,6 +35,9 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_EFI_SET_TIME=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_BOOTSTD_FULL=y
@ -62,18 +65,25 @@ CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_CMD_BOOTEFI_HELLO is not set
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
# CONFIG_CMD_POWEROFF is not set
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
CONFIG_CMD_SMC=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_OVERLAY_LIST="ti/k3-am6xx-phycore-disable-spi-nor ti/k3-am6xx-phycore-disable-rtc ti/k3-am6xx-phycore-disable-eth-phy ti/k3-am6xx-phycore-qspi-nor"
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
@ -95,6 +105,7 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000
@ -118,6 +129,7 @@ CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
# CONFIG_SPI_FLASH_SMART_HWCAPS is not set
@ -175,3 +187,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0451
CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
CONFIG_SPL_DFU=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
# CONFIG_HEXDUMP is not set

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@ -0,0 +1,4 @@
#include <configs/phycore_am62ax_r5_defconfig>
#include <configs/am62x_r5_usbdfu.config>
CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"

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@ -0,0 +1,67 @@
.. SPDX-License-Identifier: GPL-2.0+
.. sectionauthor:: Wadim Egorov <w.egorov@phytec.de>
Environment
-----------
Variables Set at Runtime
~~~~~~~~~~~~~~~~~~~~~~~~
At runtime the `boot` environment variable is set to reflect the source from which the board was booted. This ensures that the correct boot path is followed for further system initialization.
Environment Storage Selection
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The environment is loaded from a storage location based on the boot device:
* If booted from eMMC or uSD card, the environment is retrieved from FAT or a fixed offset if configured.
* If booted from SPI, the environment is retrieved from SPI flash if enabled.
For all other boot devices, the environment is not stored persistently (ENVL_NOWHERE).
Saving the Environment
~~~~~~~~~~~~~~~~~~~~~~
The `saveenv` command will store the environment on the same device the board was booted from, ensuring consistency between boot sources and stored configurations.
Capsule Updates
---------------
Capsules for each of these binaries are automatically generated as part of the build process and are named `<binary>-capsule.bin`. For example, the capsule for `u-boot.img` is named `uboot-capsule.bin`.
Performing an Update
~~~~~~~~~~~~~~~~~~~~
Each board has a dynamically generated GUID. To retrieve it, run:
.. code-block::
efidebug capsule esrt
To update the firmware, follow these steps on the board. Ensure the capsule binaries are available on a uSD card.
.. code-block:: bash
load mmc 1:1 $loadaddr tiboot3-capsule.bin
efidebug capsule update $loadaddr
load mmc 1:1 $loadaddr tispl-capsule.bin
efidebug capsule update $loadaddr
load mmc 1:1 $loadaddr uboot-capsule.bin
efidebug capsule update $loadaddr
These commands load the capsule binaries into memory and trigger the EFI capsule update process.
Important Notes
~~~~~~~~~~~~~~~
The updates are applied to the boot device from which the board is currently running. For eMMC, updates are always applied to the first boot partition. Capsule updates can be performed on eMMC, OSPI NOR, or a uSD card, depending on the boot device. For any additional configuration or troubleshooting, refer to :ref:`uefi_capsule_update_ref`.

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@ -176,6 +176,8 @@ Boot switches should be changed with power off.
- 11011100
- 00000000
.. include:: k3-common.rst
Further Information
-------------------

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@ -176,6 +176,8 @@ Boot switches should be changed with power off.
- 11001010
- 00100000
.. include:: k3-common.rst
Further Information
-------------------

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@ -175,6 +175,8 @@ Boot switches should be changed with power off.
- 11011100
- 00000000
.. include:: k3-common.rst
Further Information
-------------------

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@ -12,4 +12,8 @@
/* DDR Configuration */
#define CFG_SYS_SDRAM_BASE 0x80000000
#define PHYCORE_AM6XX_FW_NAME_TIBOOT3 u"PHYCORE_AM62AX_TIBOOT3"
#define PHYCORE_AM6XX_FW_NAME_SPL u"PHYCORE_AM62AX_SPL"
#define PHYCORE_AM6XX_FW_NAME_UBOOT u"PHYCORE_AM62AX_UBOOT"
#endif /* __PHYCORE_AM62AX_H */

3
include/env/phytec/k3_dfu.env vendored Normal file
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@ -0,0 +1,3 @@
dfu_alt_info_ram=
tispl.bin ram 0x80080000 0x200000;
u-boot.img ram 0x81000000 0x400000