Roberto Vargas fcb52dbf16 cci: Use dsb to wait before reading status register ... The CCI500 TRM explicitily requires completion of the write operation before the read operation, and it is not guaranteed by dmb but it is dsb. Change-Id: Ieeaa0d1a4b8fcb87108dea9b6de03d9c8a150829 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>		2018-08-13 14:20:30 +01:00
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arm	cci: Use dsb to wait before reading status register	2018-08-13 14:20:30 +01:00
auth	Move to mbedtls-2.10.0 tag	2018-06-18 09:35:29 +01:00
cadence/uart	drivers: cadence: cdns: Update CDNS driver to support MULTI_CONSOLE_API	2018-01-19 15:21:12 -08:00
console	Ensure read and write of flags are 32 bit	2018-05-17 16:42:41 +01:00
coreboot/cbmem_console/aarch64	coreboot: Add support for CBMEM console	2018-01-19 15:21:12 -08:00
delay_timer	Fix MISRA rule 8.3 in common code	2018-02-28 17:18:21 +00:00
gpio	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
io	Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6	2018-07-19 17:11:32 +01:00
marvell	marvell: drivers: Add i2c driver	2018-07-18 18:48:30 +03:00
mmc	drivers/mmc: Fix warning about usage of uninitialized variable	2018-08-10 14:58:08 +01:00
partition	Fix order of #includes	2017-07-12 14:45:31 +01:00
st	stm32mp1: Add DDR support and its security with TZC400	2018-07-24 17:18:19 +02:00
synopsys	drivers/dw_mmc: migrate to mmc framework	2018-08-10 17:11:12 +08:00
ti/uart	drivers: ti: uart: Add TI specific 16550 initialization	2018-06-11 14:26:32 -05:00
ufs	drivers: fix switch statements to comply with MISRA rules	2018-03-26 12:43:05 +01:00