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Fix MISRA rule 8.3 in common code

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Rule 8.3: All declarations of an object or function shall
          use the same names and type qualifiers.

Change-Id: Iff384187c74a598a4e73f350a1893b60e9d16cec
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
This commit is contained in:
Roberto Vargas 2018-02-12 12:36:17 +00:00
parent 322a98b632
commit 9fb8af33c4
10 changed files with 31 additions and 30 deletions
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4
bl31/bl31_context_mgmt.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -99,7 +99,7 @@ void cm_set_context_by_mpidr(uint64_t mpidr, void *context, uint32_t security_st
* existing cm library routines. This function is expected to be invoked for
* initializing the cpu_context for the CPU specified by MPIDR for first use.
******************************************************************************/
void cm_init_context(unsigned long mpidr, const entry_point_info_t *ep)
void cm_init_context(uint64_t mpidr, const entry_point_info_t *ep)
{
if ((mpidr & MPIDR_AFFINITY_MASK) ==
(read_mpidr_el1() & MPIDR_AFFINITY_MASK))

23
drivers/delay_timer/delay_timer.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,7 +12,7 @@
/***********************************************************
* The delay timer implementation
***********************************************************/
static const timer_ops_t *ops;
static const timer_ops_t *timer_ops;
/***********************************************************
* Delay for the given number of microseconds. The driver must
@ -20,26 +20,27 @@ static const timer_ops_t *ops;
***********************************************************/
void udelay(uint32_t usec)
{
assert(ops != NULL &&
(ops->clk_mult != 0) &&
(ops->clk_div != 0) &&
(ops->get_timer_value != NULL));
assert(timer_ops != NULL &&
(timer_ops->clk_mult != 0) &&
(timer_ops->clk_div != 0) &&
(timer_ops->get_timer_value != NULL));
uint32_t start, delta, total_delta;
assert(usec < UINT32_MAX / ops->clk_div);
assert(usec < UINT32_MAX / timer_ops->clk_div);
start = ops->get_timer_value();
start = timer_ops->get_timer_value();
/* Add an extra tick to avoid delaying less than requested. */
total_delta = div_round_up(usec * ops->clk_div, ops->clk_mult) + 1;
total_delta =
div_round_up(usec * timer_ops->clk_div, timer_ops->clk_mult) + 1;
do {
/*
* If the timer value wraps around, the subtraction will
* overflow and it will still give the correct result.
*/
delta = start - ops->get_timer_value(); /* Decreasing counter */
delta = start - timer_ops->get_timer_value(); /* Decreasing counter */
} while (delta < total_delta);
}
@ -64,5 +65,5 @@ void timer_init(const timer_ops_t *ops_ptr)
(ops_ptr->clk_div != 0) &&
(ops_ptr->get_timer_value != NULL));
ops = ops_ptr;
timer_ops = ops_ptr;
}

6
include/bl31/bl31.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -13,10 +13,10 @@
* Function prototypes
******************************************************************************/
void bl31_next_el_arch_setup(uint32_t security_state);
void bl31_set_next_image_type(uint32_t type);
void bl31_set_next_image_type(uint32_t security_state);
uint32_t bl31_get_next_image_type(void);
void bl31_prepare_next_image_entry(void);
void bl31_register_bl32_init(int32_t (*)(void));
void bl31_register_bl32_init(int32_t (*func)(void));
void bl31_warm_entrypoint(void);
#endif /* __BL31_H__ */

2
include/bl31/interrupt_mgmt.h
View file

@ -124,7 +124,7 @@ int32_t set_routing_model(uint32_t type, uint32_t flags);
int32_t register_interrupt_type_handler(uint32_t type,
interrupt_type_handler_t handler,
uint32_t flags);
interrupt_type_handler_t get_interrupt_type_handler(uint32_t interrupt_type);
interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
int disable_intr_rm_local(uint32_t type, uint32_t security_state);
int enable_intr_rm_local(uint32_t type, uint32_t security_state);

4
include/common/bl_common.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -210,7 +210,7 @@ int load_auth_image(unsigned int image_id, image_info_t *image_data);
#else
uintptr_t page_align(uintptr_t, unsigned);
uintptr_t page_align(uintptr_t value, unsigned dir);
int load_image(meminfo_t *mem_layout,
unsigned int image_id,
uintptr_t image_base,

4
include/drivers/delay_timer.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -25,7 +25,7 @@ typedef struct timer_ops {
void mdelay(uint32_t msec);
void udelay(uint32_t usec);
void timer_init(const timer_ops_t *ops);
void timer_init(const timer_ops_t *ops_ptr);
#endif /* __DELAY_TIMER_H__ */

4
include/lib/pmf/pmf.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -162,7 +162,7 @@
int pmf_get_timestamp_smc(unsigned int tid,
u_register_t mpidr,
unsigned int flags,
unsigned long long *ts);
unsigned long long *ts_value);
int pmf_setup(void);
uintptr_t pmf_smc_handler(unsigned int smc_fid,
u_register_t x1,

4
include/plat/common/platform.h
View file

@ -301,7 +301,7 @@ struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type);
* Mandatory PSCI functions (BL31)
******************************************************************************/
int plat_setup_psci_ops(uintptr_t sec_entrypoint,
const struct plat_psci_ops **);
const struct plat_psci_ops **psci_ops);
const unsigned char *plat_get_power_domain_tree_desc(void);
/*******************************************************************************
@ -311,7 +311,7 @@ void plat_psci_stat_accounting_start(const psci_power_state_t *state_info);
void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info);
u_register_t plat_psci_stat_get_residency(unsigned int lvl,
const psci_power_state_t *state_info,
int last_cpu_index);
int last_cpu_idx);
plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
const plat_local_state_t *states,
unsigned int ncpu);

6
lib/psci/psci_private.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -218,7 +218,7 @@ void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
unsigned int cpu_idx);
int psci_validate_suspend_req(const psci_power_state_t *state_info,
unsigned int is_power_down_state_req);
unsigned int is_power_down_state);
unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
@ -248,7 +248,7 @@ int psci_do_cpu_off(unsigned int end_pwrlvl);
void psci_cpu_suspend_start(entry_point_info_t *ep,
unsigned int end_pwrlvl,
psci_power_state_t *state_info,
unsigned int is_power_down_state_req);
unsigned int is_power_down_state);
void psci_cpu_suspend_finish(unsigned int cpu_idx,
psci_power_state_t *state_info);

4
lib/xlat_tables_v2/xlat_tables_private.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -83,7 +83,7 @@ unsigned long long xlat_arch_get_max_supported_pa(void);
/* Enable MMU and configure it to use the specified translation tables. */
void enable_mmu_arch(unsigned int flags, uint64_t *base_table,
unsigned long long pa, uintptr_t max_va);
unsigned long long max_pa, uintptr_t max_va);
/*
* Return 1 if the MMU of the translation regime managed by the given xlat_ctx_t