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https://github.com/ARM-software/arm-trusted-firmware.git
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drivers/dw_mmc: migrate to mmc framework
Migrate dw_mmc driver from emmc framework to mmc framework. The emmc framework will be abandoned. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
This commit is contained in:
Haojian Zhuang
parent
bd4e3deee9
commit
7a8b483067
2 changed files with 44 additions and 38 deletions
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@ -10,8 +10,8 @@
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#include <debug.h>
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#include <delay_timer.h>
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#include <dw_mmc.h>
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#include <emmc.h>
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#include <errno.h>
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#include <mmc.h>
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#include <mmio.h>
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#include <string.h>
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@ -107,6 +107,8 @@
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#define DWMMC_8BIT_MODE (1 << 6)
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#define DWMMC_ADDRESS_MASK U(0x0f)
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#define TIMEOUT 100000
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struct dw_idmac_desc {
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@ -117,13 +119,13 @@ struct dw_idmac_desc {
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};
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static void dw_init(void);
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static int dw_send_cmd(emmc_cmd_t *cmd);
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static int dw_set_ios(int clk, int width);
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static int dw_send_cmd(struct mmc_cmd *cmd);
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static int dw_set_ios(unsigned int clk, unsigned int width);
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static int dw_prepare(int lba, uintptr_t buf, size_t size);
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static int dw_read(int lba, uintptr_t buf, size_t size);
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static int dw_write(int lba, uintptr_t buf, size_t size);
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static const emmc_ops_t dw_mmc_ops = {
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static const struct mmc_ops dw_mmc_ops = {
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.init = dw_init,
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.send_cmd = dw_send_cmd,
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.set_ios = dw_set_ios,
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@ -187,7 +189,7 @@ static void dw_init(void)
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unsigned int data;
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uintptr_t base;
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assert((dw_params.reg_base & EMMC_BLOCK_MASK) == 0);
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assert((dw_params.reg_base & MMC_BLOCK_MASK) == 0);
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base = dw_params.reg_base;
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mmio_write_32(base + DWMMC_PWREN, 1);
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@ -203,7 +205,7 @@ static void dw_init(void)
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mmio_write_32(base + DWMMC_INTMASK, 0);
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mmio_write_32(base + DWMMC_TMOUT, ~0);
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mmio_write_32(base + DWMMC_IDINTEN, ~0);
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mmio_write_32(base + DWMMC_BLKSIZ, EMMC_BLOCK_SIZE);
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mmio_write_32(base + DWMMC_BLKSIZ, MMC_BLOCK_SIZE);
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mmio_write_32(base + DWMMC_BYTCNT, 256 * 1024);
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mmio_write_32(base + DWMMC_DEBNCE, 0x00ffffff);
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mmio_write_32(base + DWMMC_BMOD, BMOD_SWRESET);
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@ -215,11 +217,11 @@ static void dw_init(void)
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mmio_write_32(base + DWMMC_BMOD, data);
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udelay(100);
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dw_set_clk(EMMC_BOOT_CLK_RATE);
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dw_set_clk(MMC_BOOT_CLK_RATE);
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udelay(100);
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}
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static int dw_send_cmd(emmc_cmd_t *cmd)
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static int dw_send_cmd(struct mmc_cmd *cmd)
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{
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unsigned int op, data, err_mask;
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uintptr_t base;
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@ -230,22 +232,22 @@ static int dw_send_cmd(emmc_cmd_t *cmd)
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base = dw_params.reg_base;
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switch (cmd->cmd_idx) {
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case EMMC_CMD0:
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case 0:
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op = CMD_SEND_INIT;
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break;
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case EMMC_CMD12:
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case 12:
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op = CMD_STOP_ABORT_CMD;
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break;
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case EMMC_CMD13:
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case 13:
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op = CMD_WAIT_PRVDATA_COMPLETE;
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break;
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case EMMC_CMD8:
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case EMMC_CMD17:
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case EMMC_CMD18:
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case 8:
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case 17:
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case 18:
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op = CMD_DATA_TRANS_EXPECT | CMD_WAIT_PRVDATA_COMPLETE;
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break;
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case EMMC_CMD24:
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case EMMC_CMD25:
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case 24:
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case 25:
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op = CMD_WRITE | CMD_DATA_TRANS_EXPECT |
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CMD_WAIT_PRVDATA_COMPLETE;
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break;
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@ -257,11 +259,11 @@ static int dw_send_cmd(emmc_cmd_t *cmd)
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switch (cmd->resp_type) {
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case 0:
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break;
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case EMMC_RESPONSE_R2:
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case MMC_RESPONSE_R(2):
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op |= CMD_RESP_EXPECT | CMD_CHECK_RESP_CRC |
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CMD_RESP_LEN;
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break;
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case EMMC_RESPONSE_R3:
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case MMC_RESPONSE_R(3):
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op |= CMD_RESP_EXPECT;
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break;
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default:
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@ -307,16 +309,16 @@ static int dw_send_cmd(emmc_cmd_t *cmd)
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return 0;
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}
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static int dw_set_ios(int clk, int width)
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static int dw_set_ios(unsigned int clk, unsigned int width)
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{
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switch (width) {
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case EMMC_BUS_WIDTH_1:
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case MMC_BUS_WIDTH_1:
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mmio_write_32(dw_params.reg_base + DWMMC_CTYPE, CTYPE_1BIT);
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break;
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case EMMC_BUS_WIDTH_4:
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case MMC_BUS_WIDTH_4:
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mmio_write_32(dw_params.reg_base + DWMMC_CTYPE, CTYPE_4BIT);
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break;
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case EMMC_BUS_WIDTH_8:
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case MMC_BUS_WIDTH_8:
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mmio_write_32(dw_params.reg_base + DWMMC_CTYPE, CTYPE_8BIT);
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break;
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default:
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@ -333,12 +335,14 @@ static int dw_prepare(int lba, uintptr_t buf, size_t size)
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int desc_cnt, i, last;
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uintptr_t base;
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assert(((buf & EMMC_BLOCK_MASK) == 0) &&
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((size % EMMC_BLOCK_SIZE) == 0) &&
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assert(((buf & DWMMC_ADDRESS_MASK) == 0) &&
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((size % MMC_BLOCK_SIZE) == 0) &&
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(dw_params.desc_size > 0) &&
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((dw_params.reg_base & EMMC_BLOCK_MASK) == 0) &&
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((dw_params.desc_base & EMMC_BLOCK_MASK) == 0) &&
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((dw_params.desc_size & EMMC_BLOCK_MASK) == 0));
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((dw_params.reg_base & MMC_BLOCK_MASK) == 0) &&
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((dw_params.desc_base & MMC_BLOCK_MASK) == 0) &&
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((dw_params.desc_size & MMC_BLOCK_MASK) == 0));
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flush_dcache_range(buf, size);
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desc_cnt = (size + DWMMC_DMA_MAX_BUFFER_SIZE - 1) /
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DWMMC_DMA_MAX_BUFFER_SIZE;
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@ -367,7 +371,7 @@ static int dw_prepare(int lba, uintptr_t buf, size_t size)
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(desc + last)->des3 = 0;
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mmio_write_32(base + DWMMC_DBADDR, dw_params.desc_base);
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clean_dcache_range(dw_params.desc_base,
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flush_dcache_range(dw_params.desc_base,
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desc_cnt * DWMMC_DMA_MAX_BUFFER_SIZE);
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return 0;
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@ -383,19 +387,19 @@ static int dw_write(int lba, uintptr_t buf, size_t size)
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return 0;
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}
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void dw_mmc_init(dw_mmc_params_t *params)
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void dw_mmc_init(dw_mmc_params_t *params, struct mmc_device_info *info)
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{
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assert((params != 0) &&
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((params->reg_base & EMMC_BLOCK_MASK) == 0) &&
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((params->desc_base & EMMC_BLOCK_MASK) == 0) &&
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((params->desc_size & EMMC_BLOCK_MASK) == 0) &&
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((params->reg_base & MMC_BLOCK_MASK) == 0) &&
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((params->desc_base & MMC_BLOCK_MASK) == 0) &&
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((params->desc_size & MMC_BLOCK_MASK) == 0) &&
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(params->desc_size > 0) &&
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(params->clk_rate > 0) &&
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((params->bus_width == EMMC_BUS_WIDTH_1) ||
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(params->bus_width == EMMC_BUS_WIDTH_4) ||
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(params->bus_width == EMMC_BUS_WIDTH_8)));
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((params->bus_width == MMC_BUS_WIDTH_1) ||
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(params->bus_width == MMC_BUS_WIDTH_4) ||
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(params->bus_width == MMC_BUS_WIDTH_8)));
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memcpy(&dw_params, params, sizeof(dw_mmc_params_t));
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emmc_init(&dw_mmc_ops, params->clk_rate, params->bus_width,
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params->flags);
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mmc_init(&dw_mmc_ops, params->clk_rate, params->bus_width,
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params->flags, info);
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}
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@ -7,6 +7,8 @@
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#ifndef __DW_MMC_H__
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#define __DW_MMC_H__
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#include <mmc.h>
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typedef struct dw_mmc_params {
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uintptr_t reg_base;
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uintptr_t desc_base;
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@ -16,6 +18,6 @@ typedef struct dw_mmc_params {
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unsigned int flags;
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} dw_mmc_params_t;
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void dw_mmc_init(dw_mmc_params_t *params);
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void dw_mmc_init(dw_mmc_params_t *params, struct mmc_device_info *info);
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#endif /* __DW_MMC_H__ */
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