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0ee80f35a2
Sometimes when changing UART clock from TBG to XTAL, UART HW enters into some broken state. It does not transit characters from TX FIFO anymore and TX FIFO stays always empty. TX FIFO reset does not recover UART HW from this broken state. Experiments show that external reset can fix UART HW from this broken state. TF-A fatal error handler calls console_a3700_core_init() function to initialize UART HW. This handler may be called anytime during CPU runtime, also when kernel is running. U-Boot or Linux kernel may change UART clock to TBG to achieve higher baudrates. During initialization, console_a3700_core_init() resets UART configuration to default settings, which means that it also changes UART clock from TBG to XTAL. Do an external reset of UART via North Bridge Peripheral reset register to prevent this UART hangup. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I8990bce24d1a6fd8ccc47a2cd0a5ff932fcfcf14 |
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| .. | ||
| mochi | ||
| uart | ||
| addr_map.h | ||
| amb_adec.h | ||
| ap807_clocks_init.h | ||
| aro.h | ||
| cache_llc.h | ||
| ccu.h | ||
| gwin.h | ||
| i2c.h | ||
| io_win.h | ||
| iob.h | ||
| mci.h | ||
| thermal.h | ||