arm-trusted-firmware/docs
Boyan Karatotev 89dba82dfa perf(cpus): make reset errata do fewer branches
Errata application is painful for performance. For a start, it's done
when the core has just come out of reset, which means branch predictors
and caches will be empty so a branch to a workaround function must be
fetched from memory and that round trip is very slow. Then it also runs
with the I-cache off, which means that the loop to iterate over the
workarounds must also be fetched from memory on each iteration.

We can remove both branches. First, we can simply apply every erratum
directly instead of defining a workaround function and jumping to it.
Currently, no errata that need to be applied at both reset and runtime,
with the same workaround function, exist. If the need arose in future,
this should be achievable with a reset + runtime wrapper combo.

Then, we can construct a function that applies each erratum linearly
instead of looping over the list. If this function is part of the reset
function, then the only "far" branches at reset will be for the checker
functions. Importantly, this mitigates the slowdown even when an erratum
is disabled.

The result is ~50% speedup on N1SDP and ~20% on AArch64 Juno on wakeup
from PSCI calls that end in powerdown. This is roughly back to the
baseline of v2.9, before the errata framework regressed on performance
(or a little better). It is important to note that there are other
slowdowns since then that remain unknown.

Change-Id: Ie4d5288a331b11fd648e5c4a0b652b74160b07b9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
2025-02-24 09:36:11 +00:00
..
_static/css docs(threat model): add TF-A threat model 2021-04-30 17:59:22 +02:00
about docs(maintainers): update LTS maintainers 2025-01-24 11:25:51 -06:00
components feat(gpt): statically allocate bitlocks array 2025-02-11 15:10:49 +00:00
design perf(cpus): make reset errata do fewer branches 2025-02-24 09:36:11 +00:00
design_documents refactor(rse): put MHU code in a dedicated file 2025-02-12 10:11:49 +01:00
getting_started Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration 2025-02-11 16:52:18 +01:00
perf docs(juno): update PSCI instrumentation data 2024-11-15 13:16:28 +00:00
plat feat(fvp): increase GPT PPS to 1TB 2025-02-11 15:10:49 +00:00
process docs: remove reference to phabricator pages 2024-05-15 14:27:45 +02:00
resources docs: add inital lts doc 2025-01-21 08:40:34 -06:00
security_advisories chore: rename Poseidon to Neoverse V3 2024-03-26 11:27:31 -05:00
threat_model feat(docs): add RSE provided mboot backends to the threat model 2024-11-04 17:25:15 +01:00
tools fix(cot-dt2c): use processed Device Tree source file as input 2024-08-27 12:50:20 +01:00
change-log.md docs(changelog): changelog for v2.12 release 2024-11-19 18:08:58 -06:00
conf.py docs(changelog): changelog for v2.12 release 2024-11-19 18:08:58 -06:00
global_substitutions.txt feat(docs): add DPE to RSE desing doc 2024-11-04 17:28:15 +01:00
glossary.rst docs: add inital lts doc 2025-01-21 08:40:34 -06:00
index.rst feat(fwu): update the URL links for the FWU specification 2024-03-01 14:19:56 +05:30
license.rst feat(lib): introduce Hob creation library 2024-12-06 13:26:31 +00:00
Makefile build: install dependencies before doc build 2024-11-06 15:18:06 +01:00
porting-guide.rst Merge "docs(console): updated console docs" into integration 2025-02-12 15:33:26 +01:00