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arm-trusted-firmware/include/lib/cpus/aarch32
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Andrew Davis 81858a353f feat(ti): set L2 cache ECC and and parity on A72 cores 
The Cortex-A72 based cores on K3 platforms have cache ECC and
parity protection, enable these.

Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: Icd00bc4aa9c1c48f0fb2a10ea66e75e0b146ef3c
2023-01-12 18:42:57 -06:00
..
aem_generic.h cpus: Add casts to all definitions in CPU headers 2019-02-11 13:34:57 +00:00
cortex_a5.h cpus: Add casts to all definitions in CPU headers 2019-02-11 13:34:57 +00:00
cortex_a7.h cpus: Add casts to all definitions in CPU headers 2019-02-11 13:34:57 +00:00
cortex_a9.h Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ 2019-08-01 13:14:12 -07:00
cortex_a12.h cpus: Fix Cortex-A12 MIDR mask 2019-04-08 12:47:48 +02:00
cortex_a15.h Cortex-A15: Implement workaround for errata 827671 2019-03-13 14:05:47 +00:00
cortex_a17.h Cortex-A17: Implement workaround for errata 852421 2019-03-13 15:40:45 +00:00
cortex_a32.h cpus: Add casts to all definitions in CPU headers 2019-02-11 13:34:57 +00:00
cortex_a53.h cpus: Add casts to all definitions in CPU headers 2019-02-11 13:34:57 +00:00
cortex_a57.h Cortex-A57: Implement workaround for erratum 814670 2019-02-28 09:56:58 +00:00
cortex_a72.h feat(ti): set L2 cache ECC and and parity on A72 cores 2023-01-12 18:42:57 -06:00
cpu_macros.S Sanitise includes across codebase 2019-01-04 10:43:17 +00:00