Abhi Singh 6fa56e9367 feat(tpm): add Infineon SLB9670 GPIO SPI config ... add the Infineon Optiga SLB9670 TPM2.0 GPIO SPI configuration data, as well as chip reset and the GPIO SPI bitbang driver initialization. This code supports use with the rpi3 platform, with availibility to add configuration parameters for other platforms Change-Id: Ibdffb28fa0b3b5a18dff2ba5d4ea305633740763 Signed-off-by: Abhi Singh <abhi.singh@arm.com>		2025-03-18 19:57:56 +01:00
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arch	Merge "feat(rmmd): add FEAT_MEC support" into integration	2025-03-12 11:19:04 +01:00
bl1	refactor(bl1): clean up bl2 layout calculation	2024-04-26 09:00:12 +00:00
bl2	BL2_AT_EL3: Enable pointer authentication support	2019-02-27 11:58:09 +00:00
bl2u	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
bl31	Merge "refactor(sdei): use common create_spsr() in SDEI library" into integration	2024-03-14 21:17:45 +01:00
bl32	feat(cm): test integrity of el1_ctx registers	2024-11-08 11:05:13 +00:00
common	feat(rmm): add PCIe IO info to Boot manifest	2025-02-11 15:10:49 +00:00
drivers	feat(tpm): add Infineon SLB9670 GPIO SPI config	2025-03-18 19:57:56 +01:00
dt-bindings	fix(dt-bindings): update STM32MP2 clock and reset bindings	2024-06-27 17:17:35 +02:00
export	feat(tbbr): add image id for backup GPT	2023-10-27 08:31:54 -05:00
lib	fix(errata): workaround for Cortex-A510 erratum 2971420	2025-03-17 19:04:54 +01:00
plat	feat(drtm): introduce plat API for DLME authentication features	2025-02-26 12:52:22 +00:00
services	Merge changes from topic "mb/drtm" into integration	2025-03-12 16:11:17 +01:00
tools_share	fix(tc): add SCP_BL2 to RSE measured boot	2024-06-13 15:53:10 +02:00