Sona Mathew 81d4094d63 fix(cpus): workaround for Cortex-A78C erratum 2743232 ... Cortex-A78C erratum 2743232 is a Cat B erratum that applies to revisions r0p1 and r0p2 and is still open. The workaround is to set CPUACTLR5_EL1[56:55] to 2'b01. SDEN Documentation: https://developer.arm.com/documentation/SDEN-2004089/latest Change-Id: Ic62579c2dd69b7a8cbbeaa936f45b2cc9436439a Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>		2023-11-20 16:44:28 -06:00
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drtm	fix(tree): correct some typos	2023-05-09 15:57:12 +01:00
errata_abi	fix(cpus): workaround for Cortex-A78C erratum 2743232	2023-11-20 16:44:28 -06:00
rmmd	fix(rmmd): enable sme using sme_enable_per_world	2023-11-02 20:49:31 +02:00
sdei	Merge "fix(smccc): ensure that mpidr passed through SMC is valid" into integration	2023-11-07 13:35:30 +01:00
spm	feat(spm): separate StMM SP specifics to add support for a S-EL0 SP	2023-10-12 11:40:24 +01:00
spmd	fix(build): remove duplicated include order	2023-11-01 13:54:58 -05:00
trng	refactor(trng): discarding the used entropy bits	2022-11-14 10:08:56 +00:00
pci_svc.c	SMCCC/PCI: Handle std svc boilerplate	2021-05-25 14:49:08 +02:00
std_svc_setup.c	feat(errata_abi): errata management firmware interface	2023-05-05 13:23:10 -05:00