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https://github.com/ARM-software/arm-trusted-firmware.git
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4a97ff5111
This patch implements errata functions for two errata, both of them
disable TRBE as a workaround. This patch doesn't have functions
that disable TRBE but only implemented helper functions that are
used to detect cores affected by Errata 2938996(Cortex-A520) & 2726228(Cortex-X4)
Cortex-X4 SDEN documentation:
https://developer.arm.com/documentation/SDEN2432808/latest
Cortex-A520 SDEN Documentation:
https://developer.arm.com/documentation/SDEN-2444153/latest
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I8f886a1c21698f546a0996c719cc27dc0a23633a
42 lines
1.4 KiB
C
42 lines
1.4 KiB
C
/*
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* Copyright (c) 2021-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CORTEX_A520_H
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#define CORTEX_A520_H
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#define CORTEX_A520_MIDR U(0x410FD800)
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/*******************************************************************************
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* CPU Extended Control register specific definitions
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******************************************************************************/
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#define CORTEX_A520_CPUACTLR_EL1 S3_0_C15_C1_0
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#define CORTEX_A520_CPUECTLR_EL1 S3_0_C15_C1_4
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#define CORTEX_A520_CPUECTLR_EL1_EXTLLC_BIT U(0)
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/*******************************************************************************
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* CPU Auxiliary Control register 1 specific definitions.
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******************************************************************************/
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#define CORTEX_A520_CPUACTLR_EL1 S3_0_C15_C1_0
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/*******************************************************************************
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* CPU Power Control register specific definitions
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******************************************************************************/
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#define CORTEX_A520_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define CORTEX_A520_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
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#ifndef __ASSEMBLER__
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#if ERRATA_A520_2938996
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long check_erratum_cortex_a520_2938996(long cpu_rev);
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#else
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static inline long check_erratum_cortex_a520_2938996(long cpu_rev)
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{
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return 0;
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}
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#endif /* ERRATA_A520_2938996 */
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#endif /* __ASSEMBLER__ */
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#endif /* CORTEX_A520_H */
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