arm-trusted-firmware/docs
Boyan Karatotev 2590e819eb perf(mpmm): greatly simplify MPMM enablement
MPMM is a core-specific microarchitectural feature. It has been present
in every Arm core since the Cortex-A510 and has been implemented in
exactly the same way. Despite that, it is enabled more like an
architectural feature with a top level enable flag. This utilised the
identical implementation.

This duality has left MPMM in an awkward place, where its enablement
should be generic, like an architectural feature, but since it is not,
it should also be core-specific if it ever changes. One choice to do
this has been through the device tree.

This has worked just fine so far, however, recent implementations expose
a weakness in that this is rather slow - the device tree has to be read,
there's a long call stack of functions with many branches, and system
registers are read. In the hot path of PSCI CPU powerdown, this has a
significant and measurable impact. Besides it being a rather large
amount of code that is difficult to understand.

Since MPMM is a microarchitectural feature, its correct placement is in
the reset function. The essence of the current enablement is to write
CPUPPMCR_EL3.MPMM_EN if CPUPPMCR_EL3.MPMMPINCTL == 0. Replacing the C
enablement with an assembly macro in each CPU's reset function achieves
the same effect with just a single close branch and a grand total of 6
instructions (versus the old 2 branches and 32 instructions).

Having done this, the device tree entry becomes redundant. Should a core
that doesn't support MPMM arise, this can cleanly be handled in the
reset function. As such, the whole ENABLE_MPMM_FCONF and platform hooks
mechanisms become obsolete and are removed.

Change-Id: I1d0475b21a1625bb3519f513ba109284f973ffdf
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
2025-02-25 08:50:45 +00:00
..
_static/css docs(threat model): add TF-A threat model 2021-04-30 17:59:22 +02:00
about perf(mpmm): greatly simplify MPMM enablement 2025-02-25 08:50:45 +00:00
components perf(mpmm): greatly simplify MPMM enablement 2025-02-25 08:50:45 +00:00
design perf(cpus): make reset errata do fewer branches 2025-02-24 09:36:11 +00:00
design_documents refactor(rse): put MHU code in a dedicated file 2025-02-12 10:11:49 +01:00
getting_started perf(mpmm): greatly simplify MPMM enablement 2025-02-25 08:50:45 +00:00
perf docs(juno): update PSCI instrumentation data 2024-11-15 13:16:28 +00:00
plat feat(fvp): increase GPT PPS to 1TB 2025-02-11 15:10:49 +00:00
process docs: remove reference to phabricator pages 2024-05-15 14:27:45 +02:00
resources docs: add inital lts doc 2025-01-21 08:40:34 -06:00
security_advisories chore: rename Poseidon to Neoverse V3 2024-03-26 11:27:31 -05:00
threat_model feat(docs): add RSE provided mboot backends to the threat model 2024-11-04 17:25:15 +01:00
tools fix(cot-dt2c): use processed Device Tree source file as input 2024-08-27 12:50:20 +01:00
change-log.md docs(changelog): changelog for v2.12 release 2024-11-19 18:08:58 -06:00
conf.py docs(changelog): changelog for v2.12 release 2024-11-19 18:08:58 -06:00
global_substitutions.txt feat(docs): add DPE to RSE desing doc 2024-11-04 17:28:15 +01:00
glossary.rst docs: add inital lts doc 2025-01-21 08:40:34 -06:00
index.rst feat(fwu): update the URL links for the FWU specification 2024-03-01 14:19:56 +05:30
license.rst feat(lib): introduce Hob creation library 2024-12-06 13:26:31 +00:00
Makefile build: install dependencies before doc build 2024-11-06 15:18:06 +01:00
porting-guide.rst Merge "docs(console): updated console docs" into integration 2025-02-12 15:33:26 +01:00