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https://github.com/ARM-software/arm-trusted-firmware.git
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1a5711519a
The A/B loader [1] meant to be used for convenient CI testing. The tool is installed into the same location as SA0, where it conveniently fits due to its size, and where it makes use of non-volatile PMIC registers to alternate between loading and starting A or B copy of the BL2. The PMIC registers are used because CPU registers are lost across reset. In case the B copy is loaded, it is loaded from 8 MiB offset from start of HF. In case the B copy fails to boot, a simple reset of the system will switch back to booting previously known working A copy and allow recovery. The A/B loader sets MFIS bit MFISBTSTSR_BOOT_PARTITION to pass the information which A/B copy is currently booting on to TFA, which then loads the follow up components from 0 MiB or 8 MiB offset, depending on whether the A or B copy is being booted. The MFISBTSTSR_BOOT_PARTITION interferes with regular A/B switching during boot from eMMC as the boot media, where the BootROM also sets MFISBTSTSR_BOOT_PARTITION bit in case the system boots from SECOND eMMC HW BOOT partition. Since the A/B loader is meant as a development and CI tool, isolate the A/B loader use to RPC HF only and furthermore isolate it behind new RCAR_RPC_HYPERFLASH_ABLOADER option which is disabled by default. [1] https://github.com/marex/abloader Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Change-Id: I04ecd50fa1405b78e1ba3949d54029034d4f22d8 |
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| .. | ||
| allwinner | ||
| amlogic | ||
| arm | ||
| auth | ||
| brcm | ||
| cadence | ||
| cfi/v2m | ||
| clk | ||
| console | ||
| coreboot/cbmem_console/aarch64 | ||
| delay_timer | ||
| fwu | ||
| gpio | ||
| imx | ||
| intel/soc/stratix10/io | ||
| io | ||
| marvell | ||
| measured_boot | ||
| mentor/i2c | ||
| mmc | ||
| mtd | ||
| nxp | ||
| partition | ||
| rambus | ||
| renesas | ||
| rpi3 | ||
| scmi-msg | ||
| st | ||
| synopsys | ||
| ti/uart | ||
| ufs | ||
| usb | ||