fix(xilinx): dcc to support runtime console scope

DCC driver to support boot and runtime console scope
switch for dedicated boot and runtime consoles.

Change-Id: I7769dc44860a5fda99ca42ce17a3a6009288d7e7
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
This commit is contained in:
Maheedhar Bollapalli 2024-09-23 09:04:23 +00:00 committed by Maheedhar Bollapalli
parent d989229b54
commit 238eb542bb
4 changed files with 19 additions and 16 deletions

View file

@ -1,5 +1,6 @@
/*
* Copyright (c) 2015-2021, Xilinx Inc.
* Copyright (c) 2015-2022, Xilinx Inc.
* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
* Written by Michal Simek.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -45,7 +46,7 @@
#define TIMEOUT_COUNT_US U(0x10624)
struct dcc_console {
struct console console;
console_t console;
};
static inline uint32_t __dcc_getstatus(void)
@ -147,13 +148,14 @@ static struct dcc_console dcc_console = {
},
};
int console_dcc_register(void)
int console_dcc_register(console_t *console)
{
return console_register(&dcc_console.console);
memcpy(console, &dcc_console.console, sizeof(console_t));
return console_register(console);
}
void console_dcc_unregister(void)
void console_dcc_unregister(console_t *console)
{
dcc_console_flush(&dcc_console.console);
(void)console_unregister(&dcc_console.console);
dcc_console_flush(console);
(void)console_unregister(console);
}

View file

@ -1,5 +1,6 @@
/*
* Copyright (c) 2021, Xilinx Inc.
* Copyright (c) 2021-2022, Xilinx Inc.
* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -14,7 +15,7 @@
* Initialize a new dcc console instance and register it with the console
* framework.
*/
int console_dcc_register(void);
void console_dcc_unregister(void);
int console_dcc_register(console_t *console);
void console_dcc_unregister(console_t *console);
#endif /* DCC */
#endif /* DCC_H */

View file

@ -76,6 +76,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
{
uint32_t uart_clock;
int32_t rc;
static console_t _runtime_console;
board_detection();
@ -122,7 +123,6 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
uart_clock = get_uart_clk();
if (CONSOLE_IS(pl011_0) || CONSOLE_IS(pl011_1)) {
static console_t _runtime_console;
/* Initialize the console to provide early debug support */
rc = console_pl011_register(UART_BASE, uart_clock,
@ -138,7 +138,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
/* Initialize the dcc console for debug.
* dcc is over jtag and does not configures uart0 or uart1.
*/
rc = console_dcc_register();
rc = console_dcc_register(&_runtime_console);
if (rc == 0) {
panic();
}

View file

@ -212,7 +212,7 @@ error:
static void console_end(console_t *console)
{
if (CONSOLE_IS(dcc)) {
console_dcc_unregister();
console_dcc_unregister(console);
} else {
if (console != NULL) {
console_flush();
@ -293,7 +293,7 @@ static void handle_dt_console(dt_uart_info_t *uart_info, console_t *console,
*/
static void handle_dcc_console(console_t *console)
{
int32_t rc = console_dcc_register();
int32_t rc = console_dcc_register(console);
if (rc == 0) {
panic();
@ -377,7 +377,7 @@ void setup_console(void)
#endif
if (CONSOLE_IS(dcc)) {
/* Initialize the dcc console for debug */
rc = console_dcc_register();
rc = console_dcc_register(&boot_console);
if (rc == 0) {
panic();
}