Commit graph

12014 commits

Author SHA1 Message Date
Chris Kay
da04341ed5 build: always prefix section names with .
Some of our specialized sections are not prefixed with the conventional
period. The compiler uses input section names to derive certain other
section names (e.g. `.rela.text`, `.relacpu_ops`), and these can be
difficult to select in linker scripts when there is a lack of a
delimiter.

This change introduces the period prefix to all specialized section
names.

BREAKING-CHANGE: All input and output linker section names have been
 prefixed with the period character, e.g. `cpu_ops` -> `.cpu_ops`.

Change-Id: I51c13c5266d5975fbd944ef4961328e72f82fc1c
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-20 18:29:33 +00:00
Chris Kay
ac98b82a1f build: communicate correct page size to linker
This change communicates the common and maximum page sizes to the
linker, which allows us to use the built-in constants that it provides
to deal with page alignments.

We only support 4K pages today so the fact these are fixed is not too
much of an issue, but we will need to revisit this if we ever support
other page sizes.

Change-Id: I3358c51e70df794025ddf25209ae0e2a96550b0e
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-15 10:24:14 +00:00
Manish Pandey
be2a050583 Merge "fix(build): allow warnings when using lld" into integration 2023-02-14 17:09:35 +01:00
Manish V Badarkhe
23af5965e9 Merge changes from topic "bk/python_dependencies" into integration
* changes:
  build(docs): update Python dependencies
  fix(docs): make required compiler version == rather than >=
  fix(deps): add missing aeabi_memset.S
2023-02-14 16:14:06 +01:00
Manish V Badarkhe
9d1a325b2d Merge "docs: fix broken Juno links" into integration 2023-02-14 12:45:35 +01:00
Harrison Mutai
0cbcccc028 docs: fix broken Juno links
Certain links to Juno documentation point to a location that were
removed at some point, or are unused. Fix links to point to the latest
available version on Arm's public documentation site, and remove those
that are no longer being used.

Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I59202767db8834e9c302b2826f3faee47d3a5edd
2023-02-14 10:15:12 +00:00
Joanna Farley
2616f4b476 Merge "fix(zynqmp): enable A53 workaround(errata 1530924)" into integration 2023-02-14 10:17:43 +01:00
Joanna Farley
fb9d95e325 Merge "feat(zynqmp): add SMCCC_ARCH_SOC_ID support" into integration 2023-02-14 10:16:59 +01:00
Boyan Karatotev
b7c37e4a80 build(docs): update Python dependencies
Update the python dependencies for building the project's Sphinx
documentation. Sphinx plugins are updated to the latest version, while
Sphinx itself is only updated to 5.3.0 (latest 5.x.x revision) due to
sphinx-rtd-theme not supporting any higher (both require incompatible
versions of docutils). Myst-parser is also updated to the latest version
to prevent a docutils clash as well.

The effect of this is to bump certifi to version 2022.12.7 and wheel to
0.38.4 as suggested by dependabot.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I0ced5b127494255ce01aa7f51665bfcba161d135
2023-02-13 15:57:36 +00:00
Boyan Karatotev
415195c03e fix(docs): make required compiler version == rather than >=
TF-A carries its own compiler-rt so higher versions of the compilers may
not necessarily work. Because TF-A is only tested on the specified
versions in the CI, any breakage remains unknown. Update the
prerequisites guide to make it more apparent that this is the case.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ia5da9c5ff505ead99f579f3f5fbe3a480d697c1d
2023-02-13 15:57:25 +00:00
Boyan Karatotev
bdedee5a0f fix(deps): add missing aeabi_memset.S
This file provides __aeabi_memclr8 builtin which the Ubuntu 22.04
version of clang 14 needs to compile. Add it to prevent this oddity from
failing the build.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Id67aa0abba4a27c51b3ed6bb1be84b4e803b44bf
2023-02-13 14:37:19 +00:00
Manish V Badarkhe
3cc025629a Merge changes from topic "mixed-rwx" into integration
* changes:
  build: permit multiple linker scripts
  build: clarify linker script generation
  style: normalize linker script code style
  fix(pie): pass `-fpie` to the preprocessor as well
2023-02-13 15:36:28 +01:00
Sandrine Bailleux
c8a9556775 Merge "docs: add Runtime Security Subsystem (RSS) documentation" into integration 2023-02-13 15:20:16 +01:00
Tamas Ban
eea607cb08 docs: add Runtime Security Subsystem (RSS) documentation
Describe:
  - RSS-AP communication
  - RSS runtime services
  - Measured boot
  - Delegated Attestation

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Iaef93361a09355a1edaabcc0c59126e006ad251a
2023-02-13 10:44:23 +01:00
Chris Kay
a6ff0067ab build: permit multiple linker scripts
This change allows platforms to provide more than one linker script to
any image utilizing the `MAKE_BL` build system macro.

This is already done by some MediaTek platforms via the
`EXTRA_LINKERFILE` build system variable, which has now been removed.

In its place, additional linker scripts may be added to the
`<IMAGE>_LINKER_SCRIPT_SOURCES` variable.

BREAKING-CHANGE: The `EXTRA_LINKERFILE` build system variable has been
 replaced with the `<IMAGE>_LINKER_SCRIPT_SOURCES` variable. See the
 commit message for more information.

Change-Id: I3f0b69200d6a4841fd158cd09344ce9e67047271
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-10 17:01:47 +00:00
Chris Kay
8227493637 build: clarify linker script generation
The following build system variables have been renamed:

- `LINKERFILE` -> `DEFAULT_LINKER_SCRIPT`
- `BL_LINKERFILE` -> `DEFAULT_LINKER_SCRIPT_SOURCE`
- `<IMAGE>_LINKERFILE` -> `<IMAGE>_DEFAULT_LINKER_SCRIPT_SOURCE`

These new names better reflect how each variable is used:

1. the default linker script is passed via `-dT` instead of `-T`
2. linker script source files are first preprocessed

Additionally, linker scripts are now placed in the build directory
relative to where they exist in the source directory. For example,
the `bl32/sp_min/sp_min.ld.S` would now preprocess to
`sp_min/sp_min.ld` instead of just `bl32.ld`

BREAKING-CHANGE: The `LINKERFILE`, `BL_LINKERFILE` and
 `<IMAGE_LINKERFILE>` build system variables have been renamed. See the
 commit message for more information.

Change-Id: If8cef65dcb8820e8993736702c8741e97a66e6cc
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-10 17:01:46 +00:00
Chris Kay
f90fe02f06 style: normalize linker script code style
There are a variety of code styles used by the various linker scripts
around the code-base. This change brings them in line with one another
and attempts to make the scripts more friendly for skim-readers.

Change-Id: Ibee2afad0d543129c9ba5a8a22e3ec17d77e36ea
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-10 17:01:46 +00:00
Chris Kay
966660ecd0 fix(pie): pass -fpie to the preprocessor as well
When PIE is enabled, the `-fpie` flag is passed to the compiler but not
to the preprocessor. This change ensures that both tools are aware of
when the image is position-independent when preprocessing, which impacts
some pre-defined preprocessor definitions.

Change-Id: I5208a591d60ee01312f6bf3dd7343abe6535ee61
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-10 17:01:46 +00:00
Manish V Badarkhe
ec1c00a79c Merge "fix(tsp): loop / crash if mmap of region fails" into integration 2023-02-10 16:11:05 +01:00
Joanna Farley
ff5cfa58d2 Merge "feat(git-hooks): add pre-commit hook" into integration 2023-02-10 14:45:47 +01:00
Thomas Viehweger
8c353e0058 fix(tsp): loop / crash if mmap of region fails
In test_memory_send the variable i is of unsigned type, so
it is never negative. If i is 0, the result of i-- is
4294967295. Don't know what happens if trying to
access composite->address_range_array[4294967295].
Made i a signed integer.

Signed-off-by: Thomas Viehweger <Thomas.Viehweger@rohde-schwarz.com>
Change-Id: I8b4e532749b5e86e4b5acd238e72c3f88e309ff2
2023-02-10 14:08:13 +01:00
Manish Pandey
904da6f180 Merge "fix(context-mgmt): enable SCXTNUM access" into integration 2023-02-10 12:57:17 +01:00
Joanna Farley
a13b4cd78b Merge "fix(optee): address late comments and fix bad rc" into integration 2023-02-10 11:26:48 +01:00
Manish Pandey
7db8d3cb39 Merge "feat(spmd): copy tos_fw_config in secure region" into integration 2023-02-10 10:36:01 +01:00
Manish Pandey
d69a0bf22d Merge "fix(mpam): run-time checks for mpam save/restore routines" into integration 2023-02-10 10:20:07 +01:00
Sandrine Bailleux
af4fee04b9 Merge changes from topic "mb/tos-fw-config-load-refactor" into integration
* changes:
  feat(spmd): map SPMC manifest region as EL3_PAS
  feat(fvp): update device tree with load addresses of TOS_FW config
  refactor(fvp): rename the DTB info structure member
  feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
2023-02-10 10:05:12 +01:00
Sandrine Bailleux
493de4df53 Merge "fix(cert-create): change WARN to VERBOSE" into integration 2023-02-10 09:58:37 +01:00
Jeffrey Kardatzke
8d7c80fa4c fix(optee): address late comments and fix bad rc
There were some late comments to the prior change (18635) which are
address in this commit. There was also an invalid return value check
which was changed and the wrong result was being returned via the SMC
call for loading OP-TEE which is now fixed.

Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com>
Change-Id: I883ddf966662549a3ef9c801a2d4f47709422332
2023-02-09 13:27:36 -08:00
laurenw-arm
76a85cfa0a fix(cert-create): change WARN to VERBOSE
SAVE_KEYS is set to '0' by default, causing cert_create to
show the 'Key filename not specified' message on each run
even though this is perfectly normal. Show the message only
in the VERBOSE log level.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Change-Id: I472cdec2670055ab0edd99d172f79d01ad575972
2023-02-09 11:55:33 -06:00
Maksims Svecovs
cf9346cb83 feat(git-hooks): add pre-commit hook
Adds a pre-commit git hook to keep track of copyright year.
Checks staged files for Arm copyright header and suggests a change if
the year is outdated. Works with both single-year format and
from_year-to_year format.

Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
Change-Id: If81a0b9f5e047ec0ac401c7cf1792b9da6644926
2023-02-09 17:27:25 +00:00
Manish V Badarkhe
0cea2ae07d feat(spmd): copy tos_fw_config in secure region
The tos_fw_config is currently loaded into memory by BL2 and
consumed by SPMD (part of BL31) and BL32 firmwares. This does
not work in RME-enabled systems as BL31 uses the root PAS memory
and does not trust secure PAS memory.

A first attempt was made to map the TOS_FW_CONFIG region as root PAS,
and then to remap to secure PAS after SPMD consumption, but this was
not suitable for RME systems where memory encryption is enabled.

This can be solved by copying the TOS FW config (SPMC manifest) from
the Root PAS region to the Secure PAS region so that BL32 can consume
it.

Change-Id: I8eef8345366199cb0e367db883c34a5b5136465d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-09 15:11:44 +00:00
Michal Simek
d8133d7785 fix(zynqmp): enable A53 workaround(errata 1530924)
BL31 already reports that there is missing CPU workaround for this
erratum as
"WARNING: BL31: cortex_a53: CPU workaround for 1530924 was missing!"

That's why enable it by default as was done by other platforms for
example by commit 74665119f0 ("allwinner: Enable workaround for
Cortex-A53 erratum 1530924").

Change-Id: I251ffe3c307781b07477afb64f4e7af5dd9af9fe
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-02-09 13:27:19 +01:00
Michal Simek
8f9ba3f344 feat(zynqmp): add SMCCC_ARCH_SOC_ID support
Add support for calling SMCCC_ARCH_SOC_ID which is used by Linux soc_id
driver for printing information about manufacturer and also chip version
and silicon ID code. SOC revision is directly mapped to chip ID code.
And SOC version is composed from manufacturer ID based on JEP-106 with
chip_id which contains bits mapped to CPU register 0xffca0044 platform
bits which differentiate between silicon, qemu and other emulated
platforms.

Function description is available at
docs/getting_started/porting-guide.rst.

Change-Id: I1f19e1973593897e71b39244dbdbceb6bd0e8a07
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-02-09 13:25:50 +01:00
Maksims Svecovs
01cf14dd41 fix(context-mgmt): enable SCXTNUM access
Enable SCXTNUM_ELx access for lower ELs in non-secure state.
Make realm context setup take this build flag into account but enable it
by default when RME is used.

Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
Change-Id: Ieb0186b2fdffad464bb9316fc3973772c9c28cd0
2023-02-09 11:46:03 +00:00
Manish Pandey
35f81474fb Merge "chore: add encrypt_fw to gitignore" into integration 2023-02-08 18:37:44 +01:00
Manish V Badarkhe
c1dd9e63bf Merge changes I7bd311d7,Iea7dcfe3,I9d890934 into integration
* changes:
  refactor(allwinner): use fdt_node_is_enabled() in AXP driver
  fix(allwinner): check RSB availability in DT on H6
  refactor(fdt): introduce common fdt_node_is_enabled()
2023-02-08 15:20:10 +01:00
Sandrine Bailleux
c2ce57f519 Merge "feat(psa): interface with RSS for NV counters" into integration 2023-02-08 11:48:14 +01:00
laurenw-arm
8374508b00 feat(psa): interface with RSS for NV counters
Adding AP/RSS interface for retrieving and incrementing non-volatile
counters.

The read interface implements the psa_call:
psa_call(RSS_PLATFORM_SERVICE_HANDLE,
         RSS_PLATFORM_API_ID_NV_READ,
         in_vec, 1, out_vec, 1);

where the in_vec indicates which of the 3 counters we want, and the
out_vec stores the counter value we get back from RSS.

The increment interface implements the psa_call:
psa_call(RSS_PLATFORM_SERVICE_HANDLE,
         RSS_PLATFORM_API_ID_NV_INCREMENT,
         in_vec, 1, (psa_outvec *)NULL, 0);

where, again, in_vec indicates the counter to increment, and we don't
get any output parameter from RSS.

Through this service, we will be able to get/increment any of the 3 NV
counters used on a CCA platform:
- NV counter for CCA firmware (BL2, BL31, RMM).
- NV counter for secure firmware.
- NV counter for non-secure firmware.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Signed-off-by: Raef Coles <raef.coles@arm.com>
Change-Id: I4c1c7f4837ebff30de16bb0ce7ecd416b70b1f62
2023-02-08 10:33:48 +02:00
Manish V Badarkhe
8c829a9240 feat(spmd): map SPMC manifest region as EL3_PAS
Mapped SPMC manifest region as EL3_PAS so that it will get
mapped as Root region in RME enabled system otherwise Secure
region.

Change-Id: I1af5344d7516e948d5b3664bcdb94cdfc367cd78
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
177976286e feat(fvp): update device tree with load addresses of TOS_FW config
Provided both the root and secure addresses for TOS_FW config
in case of RME enabled systems where root address is in Root
SRAM and secure address is in Trusted DRAM.

Non-RME systems are unaffected by this change.

Change-Id: Ifb927c90fa5a68fe5362980858b4ddc5403ac95b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
f348aec1a8 refactor(fvp): rename the DTB info structure member
In line with the previous patch, the name of the member of the
hw_config DTB info structure has been renamed.

Change-Id: I6689e416fecd66faa515e820f1c4b23bcb65bfb1
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
05e5503021 feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
The 'ns-load-address' property has been renamed to 'secondary-load-
address' in order to make it more generic. It can be used to copy
the configuration to any location, be it root, secure, or non-secure.

Change-Id: I122508e155ccd99082296be3f6b8db2f908be221
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2023-02-07 11:26:38 +00:00
Manish V Badarkhe
6264643a07 Merge "refactor(tc): update total compute gpu device node" into integration 2023-02-03 17:04:42 +01:00
Andre Przywara
06eb3e366b refactor(allwinner): use fdt_node_is_enabled() in AXP driver
The Allwinner AXP driver was using a private implementation of that
function, remove that in favour of our now common implementation.

Change-Id: I7bd311d73060d4bc83f93cff6bedf6c78dddd3ca
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-02-03 13:31:28 +00:00
Andre Przywara
658b3154d5 fix(allwinner): check RSB availability in DT on H6
At the moment we access the RSB bus on all Allwinner H6 boards
unconditionally, even though some boards do not have any PMIC at all,
while others have some I2C devices connected to the same pins.
The latter case is just fragile, but the first case leads to a hang on
at least one board, as reported by Jernej.

Scan the devicetree, to check for the availability of the RSB bus node.
Proceed only if the RSB DT node is actually enabled.

Change-Id: Iea7dcfe3e085e173334d098ec4ddcb6c4b085771
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-02-03 13:31:28 +00:00
Andre Przywara
49b268ce30 refactor(fdt): introduce common fdt_node_is_enabled()
There are several users in the tree which want to check whether a given
FDT node is enabled or not: the "status" property holds that
information. So far all those users provide private implementations,
some of them having issues.

Export a generic implementation of that function in fdt_wrappers.h, as
a "static inline" function to not increase code size.
Also replace the existing implementation in Arm's fconf code, which had
a tiny bug in needlessly using the property length:
"status = [6f 6b 61 79 20];" would pass the check, where it should not.
The proper solution is also simpler: status must be a string, and
strings must be NUL-terminated in a DT. strcmp() would terminate on the
first NUL in *either* of the two strings it compares, so it would never
walk beyond the property boundary in the DTB.

Change-Id: I9d89093432f127c09add6cf5c93a725bc534e5de
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-02-03 13:31:22 +00:00
Rupinderjit Singh
cb3e9650f1 refactor(tc): update total compute gpu device node
updated gpu clocks and added gpu simple power model node

Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Change-Id: Ia475f136bec8a569f764255eb87c212a692626dc
2023-02-03 12:53:38 +00:00
Joanna Farley
d9248e8514 Merge "fix(versal-net): populate gic v3 rdist data statically" into integration 2023-02-03 10:27:25 +01:00
Joanna Farley
8b47f87a5f Merge "feat(optee): add loading OP-TEE image via an SMC" into integration 2023-02-03 00:42:17 +01:00
Joanna Farley
1548e0e7b9 Merge changes from topic "xlnx_feat_chores" into integration
* changes:
  chore(xilinx): update print information
  feat(versal-net): add jtag dcc support
2023-02-02 16:53:37 +01:00