Commit graph

30 commits

Author SHA1 Message Date
Govindraj Raja
cea1549c95 Merge "fix(mt8196): add whole-archive option to prebuilt library" into integration 2025-02-05 21:20:19 +01:00
Yidi Lin
22d74da7cd feat(mt8196): add reset and poweroff function for PSCI call
Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chromium.org>
2025-02-05 23:56:28 +08:00
Gavin Liu
8f7d9bfa0a fix(mt8196): add whole-archive option to prebuilt library
Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during the
linking process.

Change-Id: I35c728d3ccc98489183285a96f703e02dc7505d3
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2025-02-05 09:58:23 +08:00
Govindraj Raja
0c370e2d59 Merge "feat(mt8196): add SMMU driver for PM" into integration 2025-02-04 18:14:07 +01:00
Yong Wu
86dd08d838 feat(mt8196): add SMMU driver for PM
Add MediaTek SMMU power driver. This driver tracks the reference
counter for power domain access on SMMU hardware, including
Multimedia SMMU and APU SMMU. The PM get/put commands may come from
linux(EL1) and hypervisor(EL2).

Change-Id: I60f83c4e3d87059b0549b2ed8c68367be3bfbbc5
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
2025-02-04 10:39:57 +08:00
Govindraj Raja
a726d56074 Merge "feat(mt8196): enable appropriate errata" into integration 2025-02-03 16:49:02 +01:00
Douglas Anderson
0d11e62e67 feat(mt8196): enable appropriate errata
Booting mt8196 and grepping the logs for "errat" showed:

  WARNING: BL31: cortex_a720: CPU workaround for erratum 2792132 was missing!
  WARNING: BL31: cortex_a720: CPU workaround for erratum 2844092 was missing!
  WARNING: BL31: cortex_a720: CPU workaround for erratum 2926083 was missing!
  WARNING: BL31: cortex_a720: CPU workaround for erratum 2940794 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2726228 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2740089 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2763018 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2816013 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2897503 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 2923985 was missing!
  WARNING: BL31: cortex_x4: CPU workaround for erratum 3076789 was missing!

Set defines so that all the errata are fixed. Now the above shows:

  INFO:    BL31: cortex_a720: CPU workaround for erratum 2792132 was applied
  INFO:    BL31: cortex_a720: CPU workaround for erratum 2844092 was applied
  INFO:    BL31: cortex_a720: CPU workaround for erratum 2926083 was applied
  INFO:    BL31: cortex_a720: CPU workaround for erratum 2940794 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2726228 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2740089 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2763018 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2816013 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2897503 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 2923985 was applied
  INFO:    BL31: cortex_x4: CPU workaround for erratum 3076789 was applied

Change-Id: I209784c2574b99c3c275ac60adf73896e0cdd078
Signed-off-by: Douglas Anderson <dianders@chromium.org>
2025-02-01 01:01:33 +01:00
Yong Wu
4794746eec feat(mt8196): add Mediatek MMinfra stub implementation
Implement stub functions for the MMinfra (Multimedia Infrastructure)
driver to ensure that the build can pass when a prebuilt library is
not available.

Change-Id: Iadac654950c868d3743b13a1d6f7ab5d1015fb86
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
2025-01-30 23:30:09 +08:00
ot_chhao.chang
49d8c11285 feat(mt8196): enable cirq for MediaTek MT8196
- Add CIRQ related information.

Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com>
Change-Id: I758e933f9d53f7bfb16e3d7feb1c7f53516b1da6
2025-01-30 23:28:17 +08:00
Govindraj Raja
ff82102505 Merge "feat(mediatek): add gic driver" into integration 2025-01-29 23:08:26 +01:00
Govindraj Raja
2c09bf93f0 Merge changes I3f63d597,I40fc21f5 into integration
* changes:
  feat(mt8196): add mtcmos driver
  feat(mt8196): add DCM driver
2025-01-28 22:08:16 +01:00
Guangjie Song
1f913a6e3a feat(mt8196): add mtcmos driver
add mtcmos driver for ufs power control

Signed-off-by: Guangjie Song <guangjie.song@mediatek.com>
Change-Id: I3f63d5976906aaca91a71a147497e9345339774d
2025-01-28 21:59:52 +01:00
Guangjie Song
e578702f71 feat(mt8196): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down
or gate clocks during CPU or bus idle.

Add MCUSYS or bus related DCM drivers.
Enable MCUSYS or bus related DCM by default.

Signed-off-by: Guangjie Song <guangjie.song@mediatek.com>
Change-Id: I40fc21f5808962ca46870a2f3b9963dc8088f877
2025-01-28 21:59:03 +01:00
Wenzhen Yu
da8cc41bc8 feat(mt8196): add LPM v2 support
LPM means low power module, it will connect idle and SPM to achieve
lower power consumption in some scenarios, and this patch is LPM
second version

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.corp-partner.google.com>
Change-Id: I6ae5b5b4c2056d08c29efab5116be3a92351d8f1
2025-01-22 15:28:08 +08:00
Wenzhen Yu
01ce1d5d2f feat(mt8196): add SPM features support
When the system is in idle or suspend state, SPM will turn off some
unused system resources. This patch enables this feature to achieve
power saving.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ia9764b91073c4765d41fe7fcd8e4a21372c290f1
2025-01-22 15:28:08 +08:00
Kai Liang
5cb0bc07e3 feat(mt8196): add mcdi driver
Add MCDI driver to manage CPU idle states and optimize power consumption.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea38d728cb7
2025-01-22 12:01:28 +08:00
Kai Liang
4ba679da8b feat(mt8196): add pwr_ctrl module for CPU power management
Implement pwr_ctrl module to manage CPU power.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f323990176397b6e4a5
2025-01-22 11:53:33 +08:00
Hope Wang
adf73ae20a feat(mt8196): add SPMI driver
Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
2025-01-22 11:51:07 +08:00
Hope Wang
d4e6f98d7f feat(mt8196): add PMIC driver
1. Add PMIC shutdown API
2. Add PMIC low power settings

Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
2025-01-22 11:50:47 +08:00
Runyang Chen
d905b3df30 feat(mediatek): add gic driver
Add GIC driver for taking interrupts to core.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Id4d702b8579488befc1a1b6d37e66287dd534798
2025-01-14 05:17:49 +02:00
Manish Pandey
5e8509c22c Merge "feat(mt8196): link prebuilt library" into integration 2025-01-13 15:52:51 +01:00
Gavin Liu
e033943661 feat(mt8196): link prebuilt library
If MTKLIB_PATH is provided, the build will use the library provided by
MTKLIB_PATH. Otherwise, it will use stub implementation.

Change-Id: I218e724231c8bbc6cc851a240c6bbc4f6f49f154
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
2025-01-13 08:45:06 +01:00
Gavin Liu
39f5e27820 feat(mt8196): add Mediatek EMI stub implementation for mt8196
Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.

Change-Id: I296945a3df6766a3a133cd385a1e5038ca979403
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
2025-01-09 09:16:00 +02:00
Manish Pandey
999503d285 Merge changes Ic746571b,I1926cab9,Id70162e9,I3a9b014e,Ic99adba1, ... into integration
* changes:
  feat(mt8196): enable APU on mt8196
  feat(mt8196): add APU SMMU hardware semaphore operations
  feat(mt8196): add smpu protection for APU secure memory
  feat(mt8196): add APU RCX DevAPC setting
  feat(mt8196): add APU kernel control operations
  feat(mt8196): add APU power on/off functions
  feat(mt8196): add APUMMU setting
  feat(mt8196): enable apusys mailbox mpu protection
  feat(mt8196): enable apusys security control
  feat(mt8196): add APUSYS AO DevAPC setting
  feat(mt8196): add APU power-on init flow
2024-12-24 14:41:31 +01:00
Olivier Deprez
3951baa6a6 Merge "feat(mediatek): add vcp driver support" into integration 2024-12-20 11:12:22 +01:00
Karl Li
f5a6aa02a9 feat(mt8196): enable APU on mt8196
Enable APU on MT8196

Change-Id: Ic746571ba3ecf9db512e26ee2f89683f2d656239
Signed-off-by: Karl Li <karl.li@mediatek.com>
2024-12-19 09:56:25 +08:00
Xiangzhi Tang
a1763ae97e feat(mediatek): add vcp driver support
It is excepted that kernel vcp can request the vcp hw do
some security setting via SMC call services.

Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.corp-partner.google.com>
Change-Id: Ib5c01c1d72b3483262dcd821878e6e53ba9c681c
2024-12-16 07:17:23 +01:00
Mac Shen
3e43d1d317 feat(mt8196): enable DP and eDP for mt8196
- Add register definitions for DP
- Add mmap entry for DP register access

Change-Id: I22ed9fa36a7e13fcaed0c137d0e8f4449b6a52d7
Signed-off-by: Mac Shen <mac.shen@mediatek.com>
2024-12-10 10:25:01 +02:00
Cathy Xu
4cb9f2a5bf feat(mt8196): add GPIO support
- MT8196 has 271 GPIO pins. Therefore, update id to a proper datatype.
- Add GPIO support for MT8196.

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I283939684b54f79d1bba02f38e047e756a56f0c9
2024-12-04 14:30:34 +08:00
Gavin Liu
a65fadfbbd feat(mt8196): initialize platform for MediaTek MT8196
- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add timer driver configuration.

Change-Id: I07fcdeb785fcda4a955c11c39a345da4ad05ef04
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2024-12-02 09:20:48 +08:00