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fix(tc): modify gpio controller base addr for TC4 FPGA

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Modify gpio controller base addr for TC4 FPGA in dts to match
with its RoS configuration.

Change-Id: Id4ad925d23937d302adfb3e0d4b1573e5ec717c1
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
This commit is contained in:
Jagdish Gediya 2024-07-01 07:34:48 +00:00 • committed by Icen.Zeyada
parent bb9b89366f
commit 5de9d79bc4
1 changed files with 2 additions and 2 deletions
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4
fdts/tc4.dts
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@ -23,13 +23,13 @@
#define ETHERNET_ADDR 64000000 #define ETHERNET_ADDR 64000000
#define ETHERNET_INT 799 #define ETHERNET_INT 799
#define SYS_REGS_ADDR 60080000
#if TARGET_FLAVOUR_FVP #if TARGET_FLAVOUR_FVP
#define SYS_REGS_ADDR 60080000
#define MMC_ADDR 600b0000 #define MMC_ADDR 600b0000
#define MMC_INT_0 778 #define MMC_INT_0 778
#define MMC_INT_1 779 #define MMC_INT_1 779
#else /* TARGET_FLAVOUR_FPGA */ #else /* TARGET_FLAVOUR_FPGA */
#define SYS_REGS_ADDR 1c010000
#define MMC_ADDR 1c050000 #define MMC_ADDR 1c050000
#define MMC_INT_0 107 #define MMC_INT_0 107
#define MMC_INT_1 108 #define MMC_INT_1 108