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AMU: Add plat interface to select which group 1 counters to enable
A new platform macro `PLAT_AMU_GROUP1_COUNTERS_MASK` controls which group 1 counters should be enabled. The maximum number of group 1 counters supported by AMUv1 is 16 so the mask can be at most 0xffff. If the platform does not define this mask, no group 1 counters are enabled. A related platform macro `PLAT_AMU_GROUP1_NR_COUNTERS` is used by generic code to allocate an array to save and restore the counters on CPU suspend. Change-Id: I6d135badf4846292de931a43bb563077f42bb47b Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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3 changed files with 38 additions and 1 deletions
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@ -549,6 +549,22 @@ behaviour of the ``assert()`` function (for example, to save memory).
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doesn't print anything to the console. If ``PLAT_LOG_LEVEL_ASSERT`` isn't
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defined, it defaults to ``LOG_LEVEL``.
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If the platform port uses the Activity Monitor Unit, the following constants
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may be defined:
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- **PLAT\_AMU\_GROUP1\_COUNTERS\_MASK**
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This mask reflects the set of group counters that should be enabled. The
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maximum number of group 1 counters supported by AMUv1 is 16 so the mask
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can be at most 0xffff. If the platform does not define this mask, no group 1
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counters are enabled. If the platform defines this mask, the following
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constant needs to also be defined.
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- **PLAT\_AMU\_GROUP1\_NR\_COUNTERS**
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This value is used to allocate an array to save and restore the counters
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specified by ``PLAT_AMU_GROUP1_COUNTERS_MASK`` on CPU suspend.
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This value should be equal to the highest bit position set in the
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mask, plus 1. The maximum number of group 1 counters in AMUv1 is 16.
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File : plat\_macros.S [mandatory]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@ -7,9 +7,28 @@
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#ifndef __AMU_H__
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#define __AMU_H__
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/* Enable all group 0 counters */
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#include <sys/cdefs.h> /* for CASSERT() */
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#include <cassert.h>
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#include <platform_def.h>
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/* All group 0 counters */
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#define AMU_GROUP0_COUNTERS_MASK 0xf
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#ifdef PLAT_AMU_GROUP1_COUNTERS_MASK
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#define AMU_GROUP1_COUNTERS_MASK PLAT_AMU_GROUP1_COUNTERS_MASK
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#else
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#define AMU_GROUP1_COUNTERS_MASK 0
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#endif
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#ifdef PLAT_AMU_GROUP1_NR_COUNTERS
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#define AMU_GROUP1_NR_COUNTERS PLAT_AMU_GROUP1_NR_COUNTERS
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#else
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#define AMU_GROUP1_NR_COUNTERS 0
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#endif
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CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask);
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CASSERT(AMU_GROUP1_NR_COUNTERS <= 16, invalid_amu_group1_nr_counters);
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void amu_enable(int el2_unused);
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#endif /* __AMU_H__ */
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@ -36,5 +36,7 @@ void amu_enable(int el2_unused)
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/* Enable group 0 counters */
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write_amcntenset0_el0(AMU_GROUP0_COUNTERS_MASK);
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/* Enable group 1 counters */
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write_amcntenset1_el0(AMU_GROUP1_COUNTERS_MASK);
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}
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}
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