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59902b7c4c
A new platform macro `PLAT_AMU_GROUP1_COUNTERS_MASK` controls which group 1 counters should be enabled. The maximum number of group 1 counters supported by AMUv1 is 16 so the mask can be at most 0xffff. If the platform does not define this mask, no group 1 counters are enabled. A related platform macro `PLAT_AMU_GROUP1_NR_COUNTERS` is used by generic code to allocate an array to save and restore the counters on CPU suspend. Change-Id: I6d135badf4846292de931a43bb563077f42bb47b Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
34 lines
819 B
C
34 lines
819 B
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __AMU_H__
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#define __AMU_H__
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#include <sys/cdefs.h> /* for CASSERT() */
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#include <cassert.h>
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#include <platform_def.h>
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/* All group 0 counters */
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#define AMU_GROUP0_COUNTERS_MASK 0xf
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#ifdef PLAT_AMU_GROUP1_COUNTERS_MASK
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#define AMU_GROUP1_COUNTERS_MASK PLAT_AMU_GROUP1_COUNTERS_MASK
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#else
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#define AMU_GROUP1_COUNTERS_MASK 0
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#endif
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#ifdef PLAT_AMU_GROUP1_NR_COUNTERS
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#define AMU_GROUP1_NR_COUNTERS PLAT_AMU_GROUP1_NR_COUNTERS
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#else
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#define AMU_GROUP1_NR_COUNTERS 0
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#endif
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CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask);
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CASSERT(AMU_GROUP1_NR_COUNTERS <= 16, invalid_amu_group1_nr_counters);
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void amu_enable(int el2_unused);
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#endif /* __AMU_H__ */
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