mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 09:34:18 +00:00
fix(versal-net): modify function to have single return
This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store the return value to ensure single return for the function. Change-Id: Ib8b3339f32031a3657f6c349763a20a99fd828e7 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This commit is contained in:
parent
890781d10c
commit
5003a332b8
6 changed files with 57 additions and 22 deletions
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@ -42,20 +42,28 @@ const mmap_region_t *plat_get_mmap(void)
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/* For saving cpu clock for certain platform */
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uint32_t cpu_clock;
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char *board_name_decode(void)
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const char *board_name_decode(void)
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{
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const char *platform;
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switch (platform_id) {
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case VERSAL_NET_SPP:
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return "IPP";
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platform = "IPP";
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break;
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case VERSAL_NET_EMU:
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return "EMU";
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platform = "EMU";
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break;
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case VERSAL_NET_SILICON:
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return "Silicon";
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platform = "Silicon";
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break;
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case VERSAL_NET_QEMU:
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return "QEMU";
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platform = "QEMU";
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break;
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default:
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return "Unknown";
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platform = "Unknown";
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}
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return platform;
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}
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void board_detection(void)
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@ -177,16 +177,19 @@ int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
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{
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static uint32_t index;
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uint32_t i;
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int32_t ret = 0;
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/* Validate 'handler' and 'id' parameters */
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if ((handler == NULL) || (index >= MAX_INTR_EL3)) {
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return -EINVAL;
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ret = -EINVAL;
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goto exit_label;
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}
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/* Check if a handler has already been registered */
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for (i = 0; i < index; i++) {
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if (id == type_el3_interrupt_table[i].id) {
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return -EALREADY;
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ret = -EALREADY;
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goto exit_label;
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}
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}
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@ -195,7 +198,8 @@ int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
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index++;
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return 0;
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exit_label:
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return ret;
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}
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static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags,
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@ -35,7 +35,7 @@ void plat_versal_net_gic_redistif_off(void);
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extern uint32_t cpu_clock, platform_id, platform_version;
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void board_detection(void);
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char *board_name_decode(void);
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const char *board_name_decode(void);
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uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
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uint64_t x4, void *cookie, void *handle, uint64_t flags);
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int32_t sip_svc_setup_init(void);
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@ -25,6 +25,9 @@
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#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * PLATFORM_CORE_COUNT_PER_CLUSTER)
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#define E_INVALID_CORE_COUNT -1
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#define E_INVALID_CLUSTER_COUNT -3
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#define PLAT_MAX_PWR_LVL U(2)
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#define PLAT_MAX_RET_STATE U(1)
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#define PLAT_MAX_OFF_STATE U(2)
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@ -29,17 +29,18 @@ static int32_t versal_net_pwr_domain_on(u_register_t mpidr)
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{
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int32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
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const struct pm_proc *proc;
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int32_t ret = PSCI_E_INTERN_FAIL;
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VERBOSE("%s: mpidr: 0x%lx, cpuid: %x\n",
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__func__, mpidr, cpu_id);
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if (cpu_id == -1) {
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return PSCI_E_INTERN_FAIL;
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goto exit_label;
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}
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proc = pm_get_proc(cpu_id);
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if (proc == NULL) {
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return PSCI_E_INTERN_FAIL;
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goto exit_label;
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}
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(void)pm_req_wakeup(proc->node_id, (versal_net_sec_entry & 0xFFFFFFFFU) | 0x1U,
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@ -48,7 +49,10 @@ static int32_t versal_net_pwr_domain_on(u_register_t mpidr)
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/* Clear power down request */
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pm_client_wakeup(proc);
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return PSCI_E_SUCCESS;
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ret = PSCI_E_SUCCESS;
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exit_label:
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return ret;
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}
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/**
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@ -64,7 +68,7 @@ static void versal_net_pwr_domain_off(const psci_power_state_t *target_state)
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const struct pm_proc *proc = pm_get_proc(cpu_id);
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if (proc == NULL) {
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return;
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goto exit_label;
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}
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for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
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@ -94,6 +98,9 @@ static void versal_net_pwr_domain_off(const psci_power_state_t *target_state)
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SECURE_FLAG);
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}
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}
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exit_label:
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return;
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}
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/**
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@ -148,7 +155,7 @@ static void versal_net_pwr_domain_suspend(const psci_power_state_t *target_state
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const struct pm_proc *proc = pm_get_proc(cpu_id);
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if (proc == NULL) {
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return;
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goto exit_label;
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}
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for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
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@ -170,6 +177,9 @@ static void versal_net_pwr_domain_suspend(const psci_power_state_t *target_state
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SECURE_FLAG);
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/* TODO: disable coherency */
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exit_label:
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return;
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}
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static void versal_net_pwr_domain_on_finish(const psci_power_state_t *target_state)
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@ -195,7 +205,7 @@ static void versal_net_pwr_domain_suspend_finish(const psci_power_state_t *targe
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const struct pm_proc *proc = pm_get_proc(cpu_id);
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if (proc == NULL) {
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return;
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goto exit_label;
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}
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for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
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@ -214,6 +224,9 @@ static void versal_net_pwr_domain_suspend_finish(const psci_power_state_t *targe
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}
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plat_arm_gic_cpuif_enable();
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exit_label:
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return;
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}
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/**
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@ -244,6 +257,8 @@ static void __dead2 versal_net_system_off(void)
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static int32_t versal_net_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state)
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{
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int32_t ret = PSCI_E_INVALID_PARAMS;
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VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
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uint32_t pstate = psci_get_pstate_type(power_state);
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@ -258,11 +273,11 @@ static int32_t versal_net_validate_power_state(unsigned int power_state,
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}
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/* We expect the 'state id' to be zero */
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if (psci_get_pstate_id(power_state) != 0U) {
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return PSCI_E_INVALID_PARAMS;
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if (psci_get_pstate_id(power_state) == 0U) {
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ret = PSCI_E_SUCCESS;
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}
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return PSCI_E_SUCCESS;
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return ret;
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}
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/**
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@ -41,6 +41,7 @@ const uint8_t *plat_get_power_domain_tree_desc(void)
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int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
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{
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uint32_t cluster_id, cpu_id;
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int32_t ret;
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mpidr &= MPIDR_AFFINITY_MASK;
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@ -48,7 +49,8 @@ int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
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cpu_id = (uint32_t)MPIDR_AFFLVL1_VAL(mpidr);
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if (cluster_id >= PLATFORM_CLUSTER_COUNT) {
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return -3;
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ret = E_INVALID_CLUSTER_COUNT;
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goto exit_label;
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}
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/*
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* one of the two clusters present on the platform.
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*/
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if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) {
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return -1;
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ret = E_INVALID_CORE_COUNT;
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} else {
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ret = (int32_t)(cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER));
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}
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return (int32_t)(cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER));
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exit_label:
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return ret;
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}
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