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fix(versal): modify function to have single return

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This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Iffbd8770fd4ff2f2176062469d22961cbaa160b4
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This commit is contained in:
Maheedhar Bollapalli 2024-10-29 00:09:08 +00:00
parent 906d589277
commit 890781d10c
3 changed files with 26 additions and 17 deletions
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15
plat/xilinx/versal/bl31_versal_setup.c
View file

@ -151,16 +151,19 @@ int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
{
static uint32_t index;
uint32_t i;
int32_t ret = 0;
/* Validate 'handler' and 'id' parameters */
if ((handler == NULL) || (index >= MAX_INTR_EL3)) {
return -EINVAL;
ret = -EINVAL;
goto exit_label;
}
/* Check if a handler has already been registered */
for (i = 0; i < index; i++) {
if (id == type_el3_interrupt_table[i].id) {
return -EALREADY;
ret = -EALREADY;
goto exit_label;
}
}
@ -169,7 +172,8 @@ int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
index++;
return 0;
exit_label:
return ret;
}
static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags,
@ -178,6 +182,7 @@ static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags,
(void)id;
uint32_t intr_id;
uint32_t i;
uint64_t ret = 0;
interrupt_type_handler_t handler = NULL;
intr_id = plat_ic_get_pending_interrupt_id();
@ -189,10 +194,10 @@ static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags,
}
if (handler != NULL) {
return handler(intr_id, flags, handle, cookie);
ret = handler(intr_id, flags, handle, cookie);
}
return 0;
return ret;
}
void bl31_platform_setup(void)

15
plat/xilinx/versal/plat_psci.c
View file

@ -28,16 +28,17 @@ static int32_t versal_pwr_domain_on(u_register_t mpidr)
{
int32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
const struct pm_proc *proc;
int32_t ret = PSCI_E_INTERN_FAIL;
VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
if (cpu_id == -1) {
return PSCI_E_INTERN_FAIL;
goto exit_label;
}
proc = pm_get_proc((uint32_t)cpu_id);
if (proc == NULL) {
return PSCI_E_INTERN_FAIL;
goto exit_label;
}
/* Send request to PMC to wake up selected ACPU core */
@ -47,7 +48,10 @@ static int32_t versal_pwr_domain_on(u_register_t mpidr)
/* Clear power down request */
pm_client_wakeup(proc);
return PSCI_E_SUCCESS;
ret = PSCI_E_SUCCESS;
exit_label:
return ret;
}
/**
@ -246,6 +250,7 @@ static void versal_pwr_domain_off(const psci_power_state_t *target_state)
static int32_t versal_validate_power_state(uint32_t power_state,
psci_power_state_t *req_state)
{
int32_t ret = PSCI_E_SUCCESS;
VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
uint32_t pstate = psci_get_pstate_type(power_state);
@ -261,10 +266,10 @@ static int32_t versal_validate_power_state(uint32_t power_state,
/* We expect the 'state id' to be zero */
if (psci_get_pstate_id(power_state) != 0U) {
return PSCI_E_INVALID_PARAMS;
ret = PSCI_E_INVALID_PARAMS;
}
return PSCI_E_SUCCESS;
return ret;
}
/**

13
plat/xilinx/versal/plat_versal.c
View file

@ -10,13 +10,12 @@
int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
{
if ((mpidr & MPIDR_CLUSTER_MASK) != 0U) {
return -1;
int32_t ret = -1;
if (((mpidr & MPIDR_CLUSTER_MASK) == 0U) &&
((mpidr & MPIDR_CPU_MASK) < PLATFORM_CORE_COUNT)) {
ret = versal_calc_core_pos(mpidr);
}
if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) {
return -1;
}
return (int32_t)versal_calc_core_pos(mpidr);
return ret;
}