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refactor(tc): introduce a new file tc-fpga.dtsi

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A Total Compute platform supports FVP and FPGA target. And it's possible
that these two targets have different hardware components. For this
reason, this patch introduces a new file tc-fpga.dtsi for FPGA related
DT binding.

As a result, this patch moves out FVP and FPGA specific macros into
tc-fvp.dtsi and tc-fpga.dtsi respectively.

Change-Id: I48d7d30d0c500cec5500f1a2a680e8b3a276ea99
Signed-off-by: Leo Yan <leo.yan@arm.com>
This commit is contained in:
Leo Yan 2024-04-24 09:57:28 +01:00
parent f9565b2af1
commit 4e772e6ba3
5 changed files with 46 additions and 41 deletions
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24
fdts/tc-fpga.dtsi Normal file
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@ -0,0 +1,24 @@
/*
* Copyright (c) 2023-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#define STDOUT_PATH "serial0:38400n8"
#define GIC_CTRL_ADDR 30000000
#define GIC_GICR_OFFSET 0x1000000
#define UART_OFFSET 0x10000
/* 1440x3200@120 framebuffer */
#define VENCODER_TIMING_CLK 836000000
#define VENCODER_TIMING \
clock-frequency = <VENCODER_TIMING_CLK>; \
hactive = <1440>; \
vactive = <3200>; \
hfront-porch = <136>; \
hback-porch = <296>; \
hsync-len = <160>; \
vfront-porch = <3>; \
vback-porch = <217>; \
vsync-len = <10>
#define ETH_COMPATIBLE "smsc,lan9115"
#define MMC_REMOVABLE non-removable

18
fdts/tc-fvp.dtsi
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@ -4,6 +4,24 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#define STDOUT_PATH "serial0:115200n8"
#define GIC_CTRL_ADDR 2c010000
#define GIC_GICR_OFFSET 0x200000
#define UART_OFFSET 0x1000
#define VENCODER_TIMING_CLK 25175000
#define VENCODER_TIMING \
clock-frequency = <VENCODER_TIMING_CLK>; \
hactive = <640>; \
vactive = <480>; \
hfront-porch = <16>; \
hback-porch = <48>; \
hsync-len = <96>; \
vfront-porch = <10>; \
vback-porch = <33>; \
vsync-len = <2>
#define ETH_COMPATIBLE "smsc,lan91c111"
#define MMC_REMOVABLE cd-gpios = <&sysreg 0 0>
/ {
rtc@1c170000 {
compatible = "arm,pl031", "arm,primecell";

2
fdts/tc2.dts
View file

@ -32,6 +32,8 @@
#include "tc-common.dtsi"
#if TARGET_FLAVOUR_FVP
#include "tc-fvp.dtsi"
#else
#include "tc-fpga.dtsi"
#endif /* TARGET_FLAVOUR_FVP */
#include "tc-base.dtsi"

2
fdts/tc3.dts
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@ -31,6 +31,8 @@
#include "tc-common.dtsi"
#if TARGET_FLAVOUR_FVP
#include "tc-fvp.dtsi"
#else
#include "tc-fpga.dtsi"
#endif /* TARGET_FLAVOUR_FVP */
#include "tc-base.dtsi"

41
fdts/tc_vers.dtsi
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@ -13,47 +13,6 @@
#define DPU_SCMI_PD_IDX (PLAT_MAX_CPUS_PER_CLUSTER + 2)
#endif /* TC_SCMI_PD_CTRL_EN */
#if TARGET_FLAVOUR_FVP
#define STDOUT_PATH "serial0:115200n8"
#define GIC_CTRL_ADDR 2c010000
#define GIC_GICR_OFFSET 0x200000
#define UART_OFFSET 0x1000
#define VENCODER_TIMING_CLK 25175000
#define VENCODER_TIMING \
clock-frequency = <VENCODER_TIMING_CLK>; \
hactive = <640>; \
vactive = <480>; \
hfront-porch = <16>; \
hback-porch = <48>; \
hsync-len = <96>; \
vfront-porch = <10>; \
vback-porch = <33>; \
vsync-len = <2>
#define ETH_COMPATIBLE "smsc,lan91c111"
#define MMC_REMOVABLE cd-gpios = <&sysreg 0 0>
#else /* TARGET_FLAVOUR_FPGA */
#define STDOUT_PATH "serial0:38400n8"
#define GIC_CTRL_ADDR 30000000
#define GIC_GICR_OFFSET 0x1000000
#define UART_OFFSET 0x10000
/* 1440x3200@120 framebuffer */
#define VENCODER_TIMING_CLK 836000000
#define VENCODER_TIMING \
clock-frequency = <VENCODER_TIMING_CLK>; \
hactive = <1440>; \
vactive = <3200>; \
hfront-porch = <136>; \
hback-porch = <296>; \
hsync-len = <160>; \
vfront-porch = <3>; \
vback-porch = <217>; \
vsync-len = <10>
#define ETH_COMPATIBLE "smsc,lan9115"
#define MMC_REMOVABLE non-removable
#endif /* TARGET_FLAVOUR_FPGA */
/* Use SCMI controlled clocks */
#if TC_DPU_USE_SCMI_CLK
#define DPU_CLK_ATTR1 \