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4e772e6ba3
A Total Compute platform supports FVP and FPGA target. And it's possible that these two targets have different hardware components. For this reason, this patch introduces a new file tc-fpga.dtsi for FPGA related DT binding. As a result, this patch moves out FVP and FPGA specific macros into tc-fvp.dtsi and tc-fpga.dtsi respectively. Change-Id: I48d7d30d0c500cec5500f1a2a680e8b3a276ea99 Signed-off-by: Leo Yan <leo.yan@arm.com>
24 lines
695 B
Text
24 lines
695 B
Text
/*
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* Copyright (c) 2023-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#define STDOUT_PATH "serial0:38400n8"
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#define GIC_CTRL_ADDR 30000000
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#define GIC_GICR_OFFSET 0x1000000
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#define UART_OFFSET 0x10000
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/* 1440x3200@120 framebuffer */
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#define VENCODER_TIMING_CLK 836000000
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#define VENCODER_TIMING \
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clock-frequency = <VENCODER_TIMING_CLK>; \
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hactive = <1440>; \
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vactive = <3200>; \
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hfront-porch = <136>; \
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hback-porch = <296>; \
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hsync-len = <160>; \
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vfront-porch = <3>; \
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vback-porch = <217>; \
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vsync-len = <10>
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#define ETH_COMPATIBLE "smsc,lan9115"
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#define MMC_REMOVABLE non-removable
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