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https://github.com/ARM-software/arm-trusted-firmware.git
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refactor(cpus): move cpu_ops field defines to a header
The cpu_macros.S file is loaded with lots of definitions for the cpu_ops structure. However, since they are defined as .equ directives they are inaccessible for C code. Convert them to #defines, put them into order, refactor them for readability, and extract them to a separate file to make this possible. This has the benefit of removing some Aarch differences and a lot of duplicate code. Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I72861794b6c9131285a9297d5918822ed718b228
This commit is contained in:
Boyan Karatotev
parent
c0d8ee3861
commit
007433d8cf
8 changed files with 124 additions and 160 deletions
9
Makefile
9
Makefile
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@ -710,16 +710,23 @@ endif
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BL32_LDFLAGS += $(PIE_LDFLAGS)
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endif
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ifeq (${ARCH},aarch64)
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BL1_CPPFLAGS += -DREPORT_ERRATA=${DEBUG}
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BL31_CPPFLAGS += -DREPORT_ERRATA=${DEBUG}
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BL32_CPPFLAGS += -DREPORT_ERRATA=${DEBUG}
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BL1_CPPFLAGS += -DIMAGE_AT_EL3
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ifeq ($(RESET_TO_BL2),1)
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BL2_CPPFLAGS += -DIMAGE_AT_EL3
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else
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BL2_CPPFLAGS += -DIMAGE_AT_EL1
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endif
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ifeq (${ARCH},aarch64)
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BL2U_CPPFLAGS += -DIMAGE_AT_EL1
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BL31_CPPFLAGS += -DIMAGE_AT_EL3
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BL32_CPPFLAGS += -DIMAGE_AT_EL1
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else
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BL32_CPPFLAGS += -DIMAGE_AT_EL3
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endif
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# Include the CPU specific operations makefile, which provides default
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@ -33,10 +33,10 @@
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#define UINT8_LEN 8U
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#define UINT64_LEN (UINT8_LEN * sizeof(uint64_t))
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#define WORD_SIZE (sizeof(uint64_t))
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#define PKA_WORD_SIZE (sizeof(uint64_t))
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#define OP_NBW_FROM_LEN(len) (DIV_ROUND_UP_2EVAL((len), UINT64_LEN) + 1)
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#define OP_NBW_FROM_SIZE(s) OP_NBW_FROM_LEN((s) * UINT8_LEN)
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#define OP_SIZE_FROM_SIZE(s) (OP_NBW_FROM_SIZE(s) * WORD_SIZE)
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#define OP_SIZE_FROM_SIZE(s) (OP_NBW_FROM_SIZE(s) * PKA_WORD_SIZE)
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#define DT_PKA_COMPAT "st,stm32-pka64"
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -8,6 +8,7 @@
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#include <arch.h>
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#include <common/asm_macros_common.S>
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#include <lib/cpus/cpu_ops.h>
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#include <lib/spinlock.h>
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/*
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@ -24,8 +25,6 @@
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stcopr _reg, _coproc
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#endif
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#define WORD_SIZE 4
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/*
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* Co processor register accessors
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*/
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@ -49,14 +48,14 @@
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.macro dcache_line_size reg, tmp
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ldcopr \tmp, CTR
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ubfx \tmp, \tmp, #CTR_DMINLINE_SHIFT, #CTR_DMINLINE_WIDTH
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mov \reg, #WORD_SIZE
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mov \reg, #CPU_WORD_SIZE
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lsl \reg, \reg, \tmp
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.endm
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.macro icache_line_size reg, tmp
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ldcopr \tmp, CTR
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and \tmp, \tmp, #CTR_IMINLINE_MASK
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mov \reg, #WORD_SIZE
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mov \reg, #CPU_WORD_SIZE
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lsl \reg, \reg, \tmp
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.endm
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@ -7,77 +7,9 @@
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#define CPU_MACROS_S
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#include <arch.h>
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#include <lib/cpus/cpu_ops.h>
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#include <lib/cpus/errata_report.h>
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#if defined(IMAGE_BL1) || defined(IMAGE_BL32) \
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|| (defined(IMAGE_BL2) && RESET_TO_BL2)
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#define IMAGE_AT_EL3
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#endif
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#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
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(MIDR_PN_MASK << MIDR_PN_SHIFT)
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/* The number of CPU operations allowed */
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#define CPU_MAX_PWR_DWN_OPS 2
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/* Special constant to specify that CPU has no reset function */
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#define CPU_NO_RESET_FUNC 0
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/* Word size for 32-bit CPUs */
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#define CPU_WORD_SIZE 4
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/*
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* Whether errata status needs reporting. Errata status is printed in debug
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* builds for both BL1 and BL32 images.
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*/
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#if (defined(IMAGE_BL1) || defined(IMAGE_BL32)) && DEBUG
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# define REPORT_ERRATA 1
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#else
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# define REPORT_ERRATA 0
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#endif
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.equ CPU_MIDR_SIZE, CPU_WORD_SIZE
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.equ CPU_RESET_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_PWR_DWN_OPS_SIZE, CPU_WORD_SIZE * CPU_MAX_PWR_DWN_OPS
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.equ CPU_ERRATA_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_ERRATA_LOCK_SIZE, CPU_WORD_SIZE
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.equ CPU_ERRATA_PRINTED_SIZE, CPU_WORD_SIZE
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#ifndef IMAGE_AT_EL3
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.equ CPU_RESET_FUNC_SIZE, 0
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#endif
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/* The power down core and cluster is needed only in BL32 */
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#ifndef IMAGE_BL32
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.equ CPU_PWR_DWN_OPS_SIZE, 0
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#endif
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/* Fields required to print errata status */
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#if !REPORT_ERRATA
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.equ CPU_ERRATA_FUNC_SIZE, 0
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#endif
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/* Only BL32 requires mutual exclusion and printed flag. */
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#if !(REPORT_ERRATA && defined(IMAGE_BL32))
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.equ CPU_ERRATA_LOCK_SIZE, 0
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.equ CPU_ERRATA_PRINTED_SIZE, 0
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#endif
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/*
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* Define the offsets to the fields in cpu_ops structure.
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* Every offset is defined based on the offset and size of the previous
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* field.
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*/
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.equ CPU_MIDR, 0
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.equ CPU_RESET_FUNC, CPU_MIDR + CPU_MIDR_SIZE
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.equ CPU_PWR_DWN_OPS, CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
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.equ CPU_ERRATA_FUNC, CPU_PWR_DWN_OPS + CPU_PWR_DWN_OPS_SIZE
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.equ CPU_ERRATA_LOCK, CPU_ERRATA_FUNC + CPU_ERRATA_FUNC_SIZE
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.equ CPU_ERRATA_PRINTED, CPU_ERRATA_LOCK + CPU_ERRATA_LOCK_SIZE
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.equ CPU_OPS_SIZE, CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE
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/*
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* Write given expressions as words
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*
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@ -1,96 +1,15 @@
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/*
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* Copyright (c) 2014-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CPU_MACROS_S
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#define CPU_MACROS_S
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#include <arch.h>
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#include <assert_macros.S>
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#include <lib/cpus/cpu_ops.h>
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#include <lib/cpus/errata_report.h>
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#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
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(MIDR_PN_MASK << MIDR_PN_SHIFT)
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/* The number of CPU operations allowed */
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#define CPU_MAX_PWR_DWN_OPS 2
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/* Special constant to specify that CPU has no reset function */
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#define CPU_NO_RESET_FUNC 0
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#define CPU_NO_EXTRA1_FUNC 0
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#define CPU_NO_EXTRA2_FUNC 0
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#define CPU_NO_EXTRA3_FUNC 0
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/* Word size for 64-bit CPUs */
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#define CPU_WORD_SIZE 8
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/*
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* Whether errata status needs reporting. Errata status is printed in debug
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* builds for both BL1 and BL31 images.
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*/
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#if (defined(IMAGE_BL1) || defined(IMAGE_BL31)) && DEBUG
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# define REPORT_ERRATA 1
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#else
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# define REPORT_ERRATA 0
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#endif
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.equ CPU_MIDR_SIZE, CPU_WORD_SIZE
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.equ CPU_EXTRA1_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_EXTRA2_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_EXTRA3_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_E_HANDLER_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_RESET_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_PWR_DWN_OPS_SIZE, CPU_WORD_SIZE * CPU_MAX_PWR_DWN_OPS
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.equ CPU_ERRATA_FUNC_SIZE, CPU_WORD_SIZE
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.equ CPU_ERRATA_LOCK_SIZE, CPU_WORD_SIZE
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.equ CPU_ERRATA_PRINTED_SIZE, CPU_WORD_SIZE
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.equ CPU_REG_DUMP_SIZE, CPU_WORD_SIZE
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#ifndef IMAGE_AT_EL3
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.equ CPU_RESET_FUNC_SIZE, 0
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#endif
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/* The power down core and cluster is needed only in BL31 */
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#ifndef IMAGE_BL31
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.equ CPU_PWR_DWN_OPS_SIZE, 0
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#endif
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/* Fields required to print errata status. */
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#if !REPORT_ERRATA
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.equ CPU_ERRATA_FUNC_SIZE, 0
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#endif
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/* Only BL31 requieres mutual exclusion and printed flag. */
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#if !(REPORT_ERRATA && defined(IMAGE_BL31))
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.equ CPU_ERRATA_LOCK_SIZE, 0
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.equ CPU_ERRATA_PRINTED_SIZE, 0
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#endif
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#if !defined(IMAGE_BL31) || !CRASH_REPORTING
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.equ CPU_REG_DUMP_SIZE, 0
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#endif
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/*
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* Define the offsets to the fields in cpu_ops structure.
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* Every offset is defined based in the offset and size of the previous
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* field.
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*/
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.equ CPU_MIDR, 0
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.equ CPU_RESET_FUNC, CPU_MIDR + CPU_MIDR_SIZE
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.equ CPU_EXTRA1_FUNC, CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
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.equ CPU_EXTRA2_FUNC, CPU_EXTRA1_FUNC + CPU_EXTRA1_FUNC_SIZE
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.equ CPU_EXTRA3_FUNC, CPU_EXTRA2_FUNC + CPU_EXTRA2_FUNC_SIZE
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.equ CPU_E_HANDLER_FUNC, CPU_EXTRA3_FUNC + CPU_EXTRA3_FUNC_SIZE
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.equ CPU_PWR_DWN_OPS, CPU_E_HANDLER_FUNC + CPU_E_HANDLER_FUNC_SIZE
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.equ CPU_ERRATA_FUNC, CPU_PWR_DWN_OPS + CPU_PWR_DWN_OPS_SIZE
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.equ CPU_ERRATA_LOCK, CPU_ERRATA_FUNC + CPU_ERRATA_FUNC_SIZE
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.equ CPU_ERRATA_PRINTED, CPU_ERRATA_LOCK + CPU_ERRATA_LOCK_SIZE
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.equ CPU_REG_DUMP, CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE
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.equ CPU_OPS_SIZE, CPU_REG_DUMP + CPU_REG_DUMP_SIZE
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/*
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* Write given expressions as quad words
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*
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105
include/lib/cpus/cpu_ops.h
Normal file
105
include/lib/cpus/cpu_ops.h
Normal file
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@ -0,0 +1,105 @@
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/*
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* Copyright (c) 2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CPU_OPS_H
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#define CPU_OPS_H
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#include <arch.h>
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#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
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(MIDR_PN_MASK << MIDR_PN_SHIFT)
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/* Hardcode to keep compatible with assembly. sizeof(uintptr_t) */
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#if __aarch64__
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#define CPU_WORD_SIZE 8
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#else
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#define CPU_WORD_SIZE 4
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#endif /* __aarch64__ */
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/* The number of CPU operations allowed */
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#define CPU_MAX_PWR_DWN_OPS 2
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/* Special constant to specify that CPU has no reset function */
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#define CPU_NO_RESET_FUNC 0
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#if __aarch64__
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#define CPU_NO_EXTRA1_FUNC 0
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#define CPU_NO_EXTRA2_FUNC 0
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#define CPU_NO_EXTRA3_FUNC 0
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#endif /* __aarch64__ */
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/*
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* Define the sizes of the fields in the cpu_ops structure. Word size is set per
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* Aarch so keep these definitions the same and each can include whatever it
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* needs.
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*/
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#define CPU_MIDR_SIZE CPU_WORD_SIZE
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#ifdef IMAGE_AT_EL3
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#define CPU_RESET_FUNC_SIZE CPU_WORD_SIZE
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#else
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#define CPU_RESET_FUNC_SIZE 0
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#endif /* IMAGE_AT_EL3 */
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#define CPU_EXTRA1_FUNC_SIZE CPU_WORD_SIZE
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#define CPU_EXTRA2_FUNC_SIZE CPU_WORD_SIZE
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#define CPU_EXTRA3_FUNC_SIZE CPU_WORD_SIZE
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#define CPU_E_HANDLER_FUNC_SIZE CPU_WORD_SIZE
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/* The power down core and cluster is needed only in BL31 and BL32 */
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#if defined(IMAGE_BL31) || defined(IMAGE_BL32)
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#define CPU_PWR_DWN_OPS_SIZE CPU_WORD_SIZE * CPU_MAX_PWR_DWN_OPS
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#else
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#define CPU_PWR_DWN_OPS_SIZE 0
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#endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */
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/* Fields required to print errata status */
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#if REPORT_ERRATA
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#define CPU_ERRATA_FUNC_SIZE CPU_WORD_SIZE
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/* BL1 doesn't require mutual exclusion and printed flag. */
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#if defined(IMAGE_BL31) || defined(IMAGE_BL32)
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#define CPU_ERRATA_LOCK_SIZE CPU_WORD_SIZE
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#define CPU_ERRATA_PRINTED_SIZE CPU_WORD_SIZE
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#else
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#define CPU_ERRATA_LOCK_SIZE 0
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#define CPU_ERRATA_PRINTED_SIZE 0
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#endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */
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#else
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#define CPU_ERRATA_FUNC_SIZE 0
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#define CPU_ERRATA_LOCK_SIZE 0
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#define CPU_ERRATA_PRINTED_SIZE 0
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#endif /* REPORT_ERRATA */
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#if defined(IMAGE_BL31) && CRASH_REPORTING
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#define CPU_REG_DUMP_SIZE CPU_WORD_SIZE
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#else
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#define CPU_REG_DUMP_SIZE 0
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#endif /* defined(IMAGE_BL31) && CRASH_REPORTING */
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/*
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* Define the offsets to the fields in cpu_ops structure. Every offset is
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* defined based on the offset and size of the previous field.
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*/
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#define CPU_MIDR 0
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#define CPU_RESET_FUNC CPU_MIDR + CPU_MIDR_SIZE
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#if __aarch64__
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#define CPU_EXTRA1_FUNC CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
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#define CPU_EXTRA2_FUNC CPU_EXTRA1_FUNC + CPU_EXTRA1_FUNC_SIZE
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#define CPU_EXTRA3_FUNC CPU_EXTRA2_FUNC + CPU_EXTRA2_FUNC_SIZE
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#define CPU_E_HANDLER_FUNC CPU_EXTRA3_FUNC + CPU_EXTRA3_FUNC_SIZE
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#define CPU_PWR_DWN_OPS CPU_E_HANDLER_FUNC + CPU_E_HANDLER_FUNC_SIZE
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#else
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#define CPU_PWR_DWN_OPS CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
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#endif /* __aarch64__ */
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#define CPU_ERRATA_FUNC CPU_PWR_DWN_OPS + CPU_PWR_DWN_OPS_SIZE
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#define CPU_ERRATA_LOCK CPU_ERRATA_FUNC + CPU_ERRATA_FUNC_SIZE
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#define CPU_ERRATA_PRINTED CPU_ERRATA_LOCK + CPU_ERRATA_LOCK_SIZE
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#if __aarch64__
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#define CPU_REG_DUMP CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE
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#define CPU_OPS_SIZE CPU_REG_DUMP + CPU_REG_DUMP_SIZE
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#else
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#define CPU_OPS_SIZE CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE
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#endif /* __aarch64__ */
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#endif /* CPU_OPS_H */
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@ -7,6 +7,7 @@
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#include <arch.h>
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#include <asm_macros.S>
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#include <assert_macros.S>
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#include <lib/cpus/cpu_ops.h>
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#include <cpu_macros.S>
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#include <common/bl_common.h>
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#include <lib/el3_runtime/cpu_data.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <cpu_macros.S>
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#include <lib/cpus/cpu_ops.h>
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#include <lib/cpus/errata_report.h>
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#include <lib/el3_runtime/cpu_data.h>
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