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d8a7100d65
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git [rockchip fixes from Jonas Karlman via IRC]
250 lines
6.4 KiB
YAML
250 lines
6.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/bridge/ite,it6263.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ITE IT6263 LVDS to HDMI converter
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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description: |
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The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS
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to HDMI converter. Combined with LVDS receiver and HDMI 1.4a transmitter,
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the IT6263 supports LVDS input and HDMI 1.4 output by conversion function.
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The built-in LVDS receiver can support single-link and dual-link LVDS inputs,
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and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP
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1.2 and backward compatible with DVI 1.0 specification.
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The IT6263 also encodes and transmits up to 8 channels of I2S digital audio,
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with sampling rate up to 192KHz and sample size up to 24 bits. In addition,
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an S/PDIF input port takes in compressed audio of up to 192KHz frame rate.
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The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3 is
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provided by the IT6263 in two interfaces: the four I2S input ports or the
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S/PDIF input port. With both interfaces the highest possible HBR frame rate
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is supported at up to 768KHz.
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allOf:
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- $ref: /schemas/display/lvds-dual-ports.yaml#
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properties:
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compatible:
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const: ite,it6263
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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description: audio master clock
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clock-names:
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const: mclk
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data-mapping:
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enum:
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- jeida-18
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- jeida-24
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- jeida-30
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- vesa-24
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- vesa-30
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reset-gpios:
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maxItems: 1
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ivdd-supply:
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description: 1.8V digital logic power
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ovdd-supply:
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description: 3.3V I/O pin power
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txavcc18-supply:
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description: 1.8V HDMI analog frontend power
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txavcc33-supply:
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description: 3.3V HDMI analog frontend power
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pvcc1-supply:
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description: 1.8V HDMI frontend core PLL power
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pvcc2-supply:
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description: 1.8V HDMI frontend filter PLL power
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avcc-supply:
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description: 3.3V LVDS frontend power
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anvdd-supply:
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description: 1.8V LVDS frontend analog power
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apvdd-supply:
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description: 1.8V LVDS frontend PLL power
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"#sound-dai-cells":
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const: 0
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ite,i2s-audio-fifo-sources:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 1
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maxItems: 4
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items:
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enum: [0, 1, 2, 3]
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description:
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Each array element indicates the pin number of an I2S serial data input
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line which is connected to an audio FIFO, from audio FIFO0 to FIFO3.
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ite,rl-channel-swap-audio-sources:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 1
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maxItems: 4
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uniqueItems: true
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items:
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enum: [0, 1, 2, 3]
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description:
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Each array element indicates an audio source whose right channel and left
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channel are swapped by this converter. For I2S, the element is the pin
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number of an I2S serial data input line. For S/PDIF, the element is always
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0.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0: true
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port@1:
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oneOf:
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- required: [dual-lvds-odd-pixels]
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- required: [dual-lvds-even-pixels]
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description: video port for the HDMI output
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port@3:
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$ref: /schemas/graph.yaml#/properties/port
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description: sound input port
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required:
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- port@0
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- port@2
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required:
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- compatible
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- reg
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- data-mapping
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- ivdd-supply
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- ovdd-supply
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- txavcc18-supply
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- txavcc33-supply
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- pvcc1-supply
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- pvcc2-supply
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- avcc-supply
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- anvdd-supply
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- apvdd-supply
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unevaluatedProperties: false
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examples:
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- |
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/* single-link LVDS input */
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#include <dt-bindings/gpio/gpio.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi@4c {
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compatible = "ite,it6263";
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reg = <0x4c>;
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data-mapping = "jeida-24";
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reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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ivdd-supply = <®_buck5>;
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ovdd-supply = <®_vext_3v3>;
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txavcc18-supply = <®_buck5>;
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txavcc33-supply = <®_vext_3v3>;
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pvcc1-supply = <®_buck5>;
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pvcc2-supply = <®_buck5>;
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avcc-supply = <®_vext_3v3>;
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anvdd-supply = <®_buck5>;
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apvdd-supply = <®_buck5>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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it6263_lvds_link1: endpoint {
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remote-endpoint = <&ldb_lvds_ch0>;
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};
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};
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port@2 {
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reg = <2>;
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it6263_out: endpoint {
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remote-endpoint = <&hdmi_in>;
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};
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};
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};
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};
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};
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- |
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/* dual-link LVDS input */
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#include <dt-bindings/gpio/gpio.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi@4c {
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compatible = "ite,it6263";
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reg = <0x4c>;
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data-mapping = "jeida-24";
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reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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ivdd-supply = <®_buck5>;
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ovdd-supply = <®_vext_3v3>;
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txavcc18-supply = <®_buck5>;
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txavcc33-supply = <®_vext_3v3>;
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pvcc1-supply = <®_buck5>;
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pvcc2-supply = <®_buck5>;
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avcc-supply = <®_vext_3v3>;
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anvdd-supply = <®_buck5>;
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apvdd-supply = <®_buck5>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dual-lvds-odd-pixels;
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it6263_lvds_link1_dual: endpoint {
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remote-endpoint = <&ldb_lvds_ch0>;
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};
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};
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port@1 {
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reg = <1>;
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dual-lvds-even-pixels;
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it6263_lvds_link2_dual: endpoint {
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remote-endpoint = <&ldb_lvds_ch1>;
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};
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};
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port@2 {
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reg = <2>;
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it6263_out_dual: endpoint {
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remote-endpoint = <&hdmi_in>;
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};
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};
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};
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};
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};
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