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[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git [rockchip fixes from Jonas Karlman via IRC]
62 lines
1.5 KiB
YAML
62 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sa8775p-videocc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Video Clock & Reset Controller on SA8775P
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maintainers:
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm video clock control module provides the clocks, resets and power
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domains on SA8775P.
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See also: include/dt-bindings/clock/qcom,sa8775p-videocc.h
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properties:
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compatible:
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enum:
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- qcom,sa8775p-videocc
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clocks:
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items:
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- description: Video AHB clock from GCC
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- description: Board XO source
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- description: Board active XO source
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- description: Sleep Clock source
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power-domains:
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maxItems: 1
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description: MMCX power domain
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required:
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- compatible
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- clocks
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- power-domains
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/clock/qcom,sa8775p-gcc.h>
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videocc: clock-controller@abf0000 {
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compatible = "qcom,sa8775p-videocc";
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reg = <0x0abf0000 0x10000>;
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clocks = <&gcc GCC_VIDEO_AHB_CLK>,
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<&rpmhcc RPMH_CXO_CLK>,
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<&rpmhcc RPMH_CXO_CLK_A>,
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<&sleep_clk>;
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power-domains = <&rpmhpd SA8775P_MMCX>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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