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3e47302dd7
On Qualcomm systems, the setup buffer and even buffers are in a bad state at interrupt handling, so invalidate the dcache lines for the setup_buf and event buffer to make sure we read correct data written by the hardware. This fixes the following error: dwc3-generic-peripheral usb@a600000: UNKNOWN IRQ type -1 dwc3-generic-peripheral usb@a600000: UNKNOWN IRQ type 4673109 and invalid situation in dwc3_gadget_giveback() because setup_buf content is read at 0s and leads to fatal crash fixed by [1]. [1] https://lore.kernel.org/all/20240528-topic-sm8x50-dwc3-gadget-crash-fix-v1-1-58434ab4b3d3@linaro.org/ Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20241011-u-boot-dwc3-gadget-dcache-fixup-v4-3-5f3498d8035b@linaro.org Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/**
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* io.h - DesignWare USB3 DRD IO Header
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*
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* Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com
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*
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* Authors: Felipe Balbi <balbi@ti.com>,
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* Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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*
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* Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/io.h) and ported
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* to uboot.
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*
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* commit 2c4cbe6e5a : usb: dwc3: add tracepoints to aid debugging
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*
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*/
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#ifndef __DRIVERS_USB_DWC3_IO_H
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#define __DRIVERS_USB_DWC3_IO_H
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#include <cpu_func.h>
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#include <asm/io.h>
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#define CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
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static inline u32 dwc3_readl(void __iomem *base, u32 offset)
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{
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unsigned long offs = offset - DWC3_GLOBALS_REGS_START;
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u32 value;
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/*
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* We requested the mem region starting from the Globals address
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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value = readl(base + offs);
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return value;
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}
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static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
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{
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unsigned long offs = offset - DWC3_GLOBALS_REGS_START;
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/*
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* We requested the mem region starting from the Globals address
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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writel(value, base + offs);
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}
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static inline void dwc3_flush_cache(uintptr_t addr, int length)
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{
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uintptr_t start_addr = (uintptr_t)addr & ~(CACHELINE_SIZE - 1);
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uintptr_t end_addr = ALIGN((uintptr_t)addr + length, CACHELINE_SIZE);
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flush_dcache_range((unsigned long)start_addr, (unsigned long)end_addr);
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}
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static inline void dwc3_invalidate_cache(uintptr_t addr, int length)
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{
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uintptr_t start_addr = (uintptr_t)addr & ~(CACHELINE_SIZE - 1);
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uintptr_t end_addr = ALIGN((uintptr_t)addr + length, CACHELINE_SIZE);
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invalidate_dcache_range((unsigned long)start_addr, (unsigned long)end_addr);
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}
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#endif /* __DRIVERS_USB_DWC3_IO_H */
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