u-boot/drivers/clk/exynos
Simon Glass 5c10c8badf global: Rename SPL_TPL_ to PHASE_
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
..
clk-exynos850.c clk: exynos: Add SSS clocks for Exynos850 2024-07-24 16:37:09 +09:00
clk-exynos7420.c Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" 2024-05-20 13:35:03 -06:00
clk-pll.c clk: exynos: Fix incorrect clock lookup for non-top CMUs 2024-03-26 18:56:55 +09:00
clk-pll.h clk: exynos: Fix incorrect clock lookup for non-top CMUs 2024-03-26 18:56:55 +09:00
clk.c clk: exynos: Fix incorrect clock lookup for non-top CMUs 2024-03-26 18:56:55 +09:00
clk.h clk: exynos: Fix incorrect clock lookup for non-top CMUs 2024-03-26 18:56:55 +09:00
Kconfig clk: exynos: Add Exynos850 clock driver 2024-01-24 11:23:20 +09:00
Makefile global: Rename SPL_TPL_ to PHASE_ 2024-10-11 11:44:48 -06:00