u-boot/drivers/clk
Jonas Karlman c63eae2817 rockchip: clk: rk3288: Drop use of SCLK_MAC_PLL
The SCLK_MAC_PLL id is not exported or referenced upstream. It is also
not referenced in vendor U-Boot or vendor kernel 4.4, 4.19, 5.10 or 6.1.

Relax the check for parent id SCLK_MAC_PLL when using internal clock
source for gmac to allow use of clock/rk3288-cru.h from dts/upstream.

All in-tree and upstream rk3288 DTs use an external clock as parent,
so no functional change to boards is expected with this change.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:09 -06:00
..
adi
altera drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:48 -06:00
analogbits clk: sifive: append missing \n to messages 2024-09-10 10:10:43 +08:00
aspeed
at91
exynos global: Rename SPL_TPL_ to PHASE_ 2024-10-11 11:44:48 -06:00
imx clk: imx: clk-fracn-gppll: Add new PLL rate 2024-12-07 09:07:04 -03:00
intel
mediatek clk: mediatek: mt7629: fix parent clock of some top clock muxes 2024-12-31 10:58:52 -06:00
meson clk: meson: gxbb: add HDMI clocks 2024-10-14 09:06:16 +02:00
microchip clk: microchip: mpfs: support new syscon based devicetree configuration 2024-10-29 19:58:22 +08:00
mtmips
mvebu
nuvoton
owl
qcom clk/qcom: sm8250: add debug data 2024-10-04 14:57:04 +02:00
renesas clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks 2024-12-20 22:20:37 +01:00
rockchip rockchip: clk: rk3288: Drop use of SCLK_MAC_PLL 2025-01-10 18:56:09 -06:00
sifive drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:48 -06:00
sophgo clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC 2024-09-11 20:32:06 +08:00
starfive dts: starfive: Switch to using upstream DT 2024-12-18 13:19:15 +08:00
stm32 drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:48 -06:00
sunxi clk: sunxi: a80: Fix reset description 2024-10-10 00:23:41 +01:00
tegra driver: clk: tegra: init basic clocks on probe 2024-12-16 17:07:39 -06:00
ti clk: ti: clk-k3-pll: Add additional robustness steps to the PLL sequence 2024-12-06 16:38:16 -06:00
uniphier
clk-cdce9xx.c
clk-composite.c
clk-divider.c
clk-fixed-factor.c
clk-gate.c
clk-gpio.c
clk-hsdk-cgu.c
clk-mux.c
clk-uclass.c clk: Propagate clk_set_rate() if CLK_SET_PARENT_RATE present 2024-12-12 14:23:25 -06:00
clk-xlnx-clock-wizard.c
clk.c
clk_bcm6345.c
clk_boston.c
clk_fixed_factor.c
clk_fixed_rate.c
clk_k210.c
clk_octeon.c
clk_pic32.c
clk_sandbox.c
clk_sandbox_ccf.c
clk_sandbox_test.c
clk_scmi.c
clk_versaclock.c
clk_versal.c
clk_vexpress_osc.c drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:48 -06:00
clk_zynq.c drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:48 -06:00
clk_zynqmp.c
ics8n3qv01.c
Kconfig clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC 2024-09-11 20:32:06 +08:00
Makefile global: Rename SPL_TPL_ to PHASE_ 2024-10-11 11:44:48 -06:00
mpc83xx_clk.c global_data: Move pci_clk to m68k and powerpc 2024-08-26 14:05:37 -06:00
mpc83xx_clk.h clk: mpc83xx: Fix typo in "Coherent System Bus" 2024-12-15 02:03:52 +01:00