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u-boot/arch/arm/mach-renesas
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Paul Barker 9d81a9ff99 arm: renesas: Fix RZ/G2L GICR base address 
When support for the Renesas RZ/G2L SoC was added, the GICR base address
for CPU1 was accidentally used. We should instead supply the GICR base
address for CPU0 so that interrupts are correctly configured for the
CPU core that U-Boot is actually using.

Fixes: 387d4275ab ("arm: rmobile: Add basic RZ/G2L family support")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-11-10 19:36:54 +01:00
..
include/mach arm: renesas: Fix RZ/G2L GICR base address 2024-11-10 19:36:54 +01:00
board.c
cpu_info-rcar.c
cpu_info-rzg.c
cpu_info-rzg2l.c
cpu_info.c
emac.c
Kconfig ARM: dts: renesas: Switch to using upstream DT on 64bit Renesas SoCs 2024-04-18 05:21:03 +02:00
Kconfig.32
Kconfig.64
Kconfig.rcar3
Kconfig.rcar4
Kconfig.rza1
Kconfig.rzg2l
Kconfig.rzn1
lowlevel_init_ca15.S arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
lowlevel_init_gen3.S
Makefile
memmap-gen3.c Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" 2024-05-20 13:35:03 -06:00
memmap-rzg2l.c Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" 2024-05-20 13:35:03 -06:00
psci-r8a779a0.c