We make fewer calls to dm_test_restore() since
commit fbdac8155c ("test: Expand implementation of ut_list_has_dm_tests()")
Because of this some valid test combinations are now broken:
$ ./test/py/test.py --bd sandbox --build -k test_ut
$ ./test/py/test.py --bd sandbox --build -k "bootflow_android or bootflow_cros"
Shows:
Expected ' 2 cros ready mmc 4 mmc5.bootdev.part_4 ',
got ' 2 cros ready mmc 2 mmc5.bootdev.part_2 '
Here prep_mmc_bootdev() is called twice and it will bind bootmeth_cros twice.
Since bootmeth_cros is bound twice, 'bootflow scan' will find 2x the
expected bootflows.
Before
commit fbdac8155c ("test: Expand implementation of ut_list_has_dm_tests()")
this did not happen because a cleanup was called each time.
Add UTF_DM and UTF_SCAN_FDT flags to both tests to make sure that the
bootmeths are unbound after the test finishes.
Fixes: fbdac8155c ("test: Expand implementation of ut_list_has_dm_tests()")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/23474
- UFS support is enabled for SC7280 and SM8150 platforms.
- Qualcomm dt-bindings headers are all dropped in favour of
dts/upstream.
- The SMMU driver now correctly handles stream ID 0 and is disabled in
EL2.
- Initial support for capsule updates (using the new dynamic UUIDs) is
added for the RB3 Gen 2 board alongside a new SCSI backend for DFU.
- CONFIG_PINCONF is enabled in qcom_defconfig.
- The vqmmc supply is now enabled for sdcard support on boards that need
it.
- A quirk is added for reading GPIOs on the PM8550 PMIC
Some dt-binding headers mask the upstream ones which can lead to build
failures, or worse: super weird bugs, if they get out of sync.
Remove these headers so our devicetree and binding headers will both be
in sync with upstream.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
We only need to configure the SMMU when running in EL1. In EL2 the
hypervisor isn't running so peripherals can just do DMA as they wish.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
It turns out this is a very real stream ID. Who woulda thought?
Drop the 0 check on the SID, there's no reason for it to be there in the first
place.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Enable all the necessary options for capsule updates to work, as well as
a few additional EFI features.
Capsule updates themselves are only enabled for the RB3 Gen 2, since the
exact details on where to flash U-Boot (or how to handle multiple boot
methods) has not been finalised for other boards.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Qualcomm boards flash U-Boot a variety of partitions, implement support
for determining which slot U-Boot is running from, finding the correct
partition for that slot and configuring the appropriate DFU string.
Initially, we only support the RB3 Gen 2 where U-Boot is flashed to the
UEFI partition, and ignore handling of slots. In the future we will
additionally support booting U-Boot from other partitions (e.g. boot)
and correct handling for A/B.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
GPT partition tables include two bytes worth of vendor defined
attributes, per partition. ChromeOS and Qualcomm both use these (with
different encoding!) to handle A/B slot switching with a retry counter.
Expose these via the disk_partition struct so that they can be parsed by
the relevant board code.
This will be used on Qualcomm boards to determine which slot we're
booting on so that we can flash capsule updates to the correct one.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This is extremely similar to the MMC backend, but there are some notable
differences.
Works with a DFU string like
scsi 4=u-boot-bin part 11
Where "4" is the SCSI dev number (sequential LUN across all SCSI devices)
and "11" is the partition number.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add configuration for the SC7280, copied from Linux 6.11
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Now the Qualcomm controller and PHY drivers were accepted,
enable then in the qcom_defconfig file.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
The upstream version has new defines use to build DT, drop
it in favor of the dts/upstream more recent one.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
The ufsphy_v2_regs_layout is not used, drop it and fix:
phy-qcom-qmp-ufs.c:87:27: warning: ‘ufsphy_v2_regs_layout’ defined but not used [-Wunused-const-variable=]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
The qcom_pmic code is broken for new PMICs and should be fixed,
without the QUIRK the code is broken and the GPIOs don't work
anymore on SM8550 and SM8650 platforms.
Partially revert the revert and only add the quirk on the PM8550
PMIC, making the buttons and MMC detect gpio work again.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
On earlier platforms, the vqmmc regulator was enabled by the
previous bootloader, but on the newest (SM8650) it's not
and we need vqmmc to be enabled in order to have the card
to respond.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Set LOG_CATEGORY and pr_fmt. Also fix the time.h include.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Fastboot is very hungry when it flashes larges chunks, and 8MiB
is way too small, allocate a much bigger size like other platforms
using Fastboot.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # rb1
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
The SM8550 and SM8650 SoCs requires PINCONF to properly
setup SDC pins in order to function correctly.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
There is no common symbol which mini configurations are using and recent
get_mem_top() changes adding 1.3kB without having a way to remove it.
That's why introduce new symbol which can be used for removing features
which are not requested by these configurations.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa27b72e17057fa8cbdd92a2bbb863a31c8c1226.1731681053.git.michal.simek@amd.com
Activate the xSPI Software Reset support, which will be
utilized to transition from octal DTR mode to legacy
mode during shutdown and boot (if enabled).
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114042641.22642-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The Micron MT35 series octal flashes can be activated
through the configuration option CONFIG_SPI_FLASH_MT35XU.
To ensure their detection, enable this option in the
default defconfig for octal flashes.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114051047.13700-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Moving the hw_reset function from the controller driver to
the NOR framework has caused the OSPI reset not to be triggered
in the Cadence driver's probe function. As a result, reading the
flash ID during SPI calibration is incorrect, and the
CQSPI_REG_RD_DATA_CAPTURE is set with an invalid value.This makes
it unable to read the flash ID properly.
To solve this problem, it's suggested to skip SPI calibration and
instead retrieve the read_delay directly from the device tree.
Skipping SPI calibration doesn't bring harm since there's no need
for the flash golden values stored during SPI calibration.
Instead, they are now read during the spi_nor_read_id call in the
NOR framework.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114062045.17581-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
ut_check_console_line() does include an assert.
Pass the result to ut_assertok().
Addresses-Coverity-ID: 514958 Error handling issues
Fixes: 7dfafcd65e ("test: unit test for hash command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Some Kconfig symbols introduced in commit 8cb330355b ("net: introduce
alternative implementation as net/lwip/") need a full description. The
NET symbol needs one, too.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The maximum length of a domain name is 253 as defined in RFC 1035.
So SERVER_NAME_SIZE should be 254 including NUL.
Fixes: 3c656c928b ("net: lwip: add wget command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Nam Cao <namcao@linutronix.de> says:
We observed the following sporadic boot failure while booting from MMC
device:
=> boot
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
** Booting bootflow 'mmc@2194000.bootdev.part_1' with extlinux
Ignoring unknown command: �D���D��
Boot failed (err=-14)
The reason is because while allocating buffer to read a file from MMC,
alignment of 1 byte is used. Thus, the buffer doesn't work for performing
DMA, and garbage data is read.
While looking at this issue, I also noticed that if no alignment specified
(align=0) then fs_read_alloc() is documented to use the default. But the
default is no alignment. Therefore, other users of fs_read_alloc() which
specify align=0 may be broken as well.
The first patch changes extlinux_read_bootflow() to use proper buffer
alignment for DMA.
The second patch changes the default alignment of fs_read_alloc() to be
DMA-suitable, to fix other potential bugs.
The comment above fs_read_alloc() explains:
@align: Alignment to use for memory allocation (0 for default)
However, in the actual implementation, there is no alignment when @align is
zero.
This current default is probably fine for most cases. But for some block
devices which transfer data via DMA, ARCH_DMA_MINALIGN is needed.
Change the default alignment to ARCH_DMA_MINALIGN.
Fixes: de7b5a8a1a ("fs: Create functions to load and allocate a file")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Javier Fernandez Pastrana <javier.pastrana@linutronix.de>
extlinux_read_bootflow() allocates a buffer to read from file system
without any alignment.
But for some block devices which transfer data via DMA, ARCH_DMA_MINALIGN
alignment is required. For example, due to misaligned buffer, the below
boot failure is observed.
=> boot
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
** Booting bootflow 'mmc@2194000.bootdev.part_1' with extlinux
Ignoring unknown command: �D���D��
Boot failed (err=-14)
Change the buffer alignment to ARCH_DMA_MINALIGN.
Fixes: 31aefaf89a ("bootstd: Add an implementation of distro boot")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Javier Fernandez Pastrana <javier.pastrana@linutronix.de>
One is adding some missing TPM files for proper maintenance.
The second addresses Coverity-ID: 356664 replacing a mempcy()
which has undefined behavior with memmove()
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Merge tag 'tpm-master-16112024' of https://source.denx.de/u-boot/custodians/u-boot-tpm
CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/23393
- Two changes from Heinrich:
- One is adding some missing TPM files for proper maintenance.
- The second addresses Coverity-ID: 356664 replacing a mempcy() which
has undefined behavior with memmove()
All TPM code should be maintained.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The behavior of memcpy() for overlapping buffers is undefined.
Fixes: 4c57ec76b7 ("tpm: Implement state command for Cr50")
Addresses-Coverity-ID: 356664 Overlapping buffer in memory copy
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Running commands such as 'load mmc 2:1 $addr $path' when path does not
exists will print an error twice if the file does not exist, e.g.:
```
Cannot lookup file boot/boot.scr
Failed to load 'boot/boot.scr'
```
(where the first line is printed by btrfs and the second by common fs
code)
Historically other filesystems such as ext4 or fat have not been
printing a message here, so do the same here to avoid duplicate.
The other error messages in this function are also somewhat redundant,
but bring useful diagnostics if they happen somewhere, so have been left
as printf.
Note that if a user wants no message to be printed for optional file
loads, they have to check for file existence first with other commands
such as 'size'.
Signed-off-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Fix the critical thermal threshold for i.MX processors, this was changed
while moving the code from imx8m/imx9 directories into a shared place.
There is no need to keep the critical threshold 5 degrees less than the
SoC maximum temperature threshold, what is actually going to happen in
practice is that we are going to power-off the board when the SoC is
still within its working temperature range.
In addition to that this is a change in the actual behavior, that is
introducing a regression to users, and it was hidden within a software
refactoring.
Fixes: d0fe80890a ("imx: Generalize fixup_thermal_trips")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Add native support of the bootcount mechanism in the ZynqMP by
utilising internal PMU registers. The Persistent Global Storage
Registers of the Platform Management Unit can keep their value
during reboot cycles unless there is a POR reset, making them
appropriate for the bootcount mechanism.
Signed-off-by: Vasileios Amoiridis <vasileios.amoiridis@cern.ch>
Reviewed-by: Heiko Schocher <hs@denx.de>
Link: https://lore.kernel.org/r/20241105132744.1572759-2-vassilisamir@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
For E.G. signed FPGA bitstreams, similar to how it is done for the FPGA
loading from SPL since commit 71f1a5392a ("spl: fit: pass real compatible
flags to fpga_load()").
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Link: https://lore.kernel.org/r/20241105162136.839633-1-peter@korsgaard.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The cpu release command for r5 mode (lockstep/split) argument
accepts only string. But the zynqmp tcminit command accepts
string or number for r5 mode (lockstep/split or 0/1) argument.
To fix the r5 mode argument, the common argument (lockstep/split
or 0/1) is used across different u-boot commands. Use the strcmp()
instead of strncmp() to make uniform the r5 mode (lockstep/split
or 0/1) for the zynqmp tcminit and cpu release command.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241104122750.96251-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Use the get_mem_top function to compute the value of ram_top. This was
earlier done through LMB API's, which are no longer available till
after relocation. Use get_mem_top() instead to compute the ram_top
value.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20241025172724.195093-3-sughosh.ganu@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add generic logic to determine the ram_top value for boards. Earlier,
this was achieved in an indirect manner through a set of LMB API's.
That has since changed so that the LMB code is available only after
relocation. Replace those LMB calls with a single call to
get_mem_top() to determine the value of ram_top.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20241025172724.195093-2-sughosh.ganu@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add test overlay .S and u_boot_logo file to gitignore as these files are
generated and should not be committed but ignored.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
