Commit graph

168 commits

Author SHA1 Message Date
Michal Simek
8bca6c3de9 xilinx: Enable meminfo command with mapping
Enable meminfo command to be able to see where things are mapped.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b7f9f5e18e16a945277d4b8cfde5a7f057e77676.1737976295.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
e6f779999a xilinx: Enable mkfwumdata tool for a/b update
Build mkfwumdata tool by default for building ab mdata structure.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d82c9a2db30e12ea17fa125c68a555d7f070851.1737723845.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
c2612feb65 xilinx: Sort OF_LIST and add missing vpk120 and zcu670 platforms
Sort OF_LIST entries and also add missing vpk120 and zcu670 platforms.
Compilation is failing when these DTs are exported via DEVICE_TREE because
binman is not able to create a link for default configuration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/505996b6ef969b1b677ab921462c75c798c366e7.1734335553.git.michal.simek@amd.com
2025-01-14 08:29:45 +01:00
Michal Simek
a4c9811910 arm64: zynqmp: Generate u-boot.itb and QSPI image via binman
u-boot.itb has been generated via mkimage_fit_atf.sh but it is on the way
out that's why convert it's description to binman.
Compare to script binman description is not able to configure BL31 and BL32
load/entry addresses which should be done separately.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/90b613796aee38158252c8bb1dfc3da0420f089d.1730452668.git.michal.simek@amd.com
2024-11-27 08:59:03 +01:00
Tom Rini
7fe55182d9 AMD/Xilinx changes for v2025.01-rc3
microblaze:
 - Disable JFFS2
 
 fpga:
 - pass compatible flag to fpga_load()
 
 zynqmp:
 - SOM RTC fix
 - SC(system controller) PMW polarity fix
 - Fix ram_top calculation with introducing XILINX_MINI
 - Fix RPU release command
 
 versal:
 - Enable capsule update
 - Enable soft reset and Micron octal flashes
 
 xilinx:
 - Align Kconfig regarding SPI_STACKED_PARALLEL
 
 bootcount:
 - Add new zynqmp driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZzyoqgAKCRDKSWXLKUoM
 IapRAJ43XGmKG7VAzbf/i39GUmCaSgMBswCfRsyWtnhaUFC9qo/WfZN2+C6QkEU=
 =1LxQ
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc3:

- microblaze:
  - Disable JFFS2
- fpga:
  - pass compatible flag to fpga_load()
- zynqmp:
  - SOM RTC fix
  - SC(system controller) PMW polarity fix
  - Fix ram_top calculation with introducing XILINX_MINI
  - Fix RPU release command
- versal:
  - Enable capsule update
  - Enable soft reset and Micron octal flashes
- xilinx:
  - Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
  - Add new zynqmp driver
2024-11-19 12:58:05 -06:00
Michal Simek
6f7ff73fba arm64: xilinx: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL
Align defconfigs with the latest Kconfig layout.

Fixes: f896aa6567 ("mtd: spi-nor: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fe05a0e542d6117c10956e4a104123e46f956793.1730450241.git.michal.simek@amd.com
2024-11-15 14:32:47 +01:00
Tom Rini
867e16ae05 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-11-12 15:00:36 -06:00
Tom Rini
f8efc68b30 Merge patch series "spi-nor: Add parallel and stacked memories support"
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> says:

This series adds support for Xilinx qspi parallel and
stacked memeories.

In parallel mode, the current implementation assumes that a maximum
of two flashes are connected. The QSPI controller splits the data
evenly between both the flashes so, both the flashes that are connected
in parallel mode should be identical.
During each operation SPI-NOR sets 0th bit for CS0 & 1st bit for CS1 in
nor->flags.

In stacked mode the current implementation assumes that a maximum of two
flashes are connected and both the flashes are of same make but can differ
in sizes. So, except the sizes all other flash parameters of both the flashes
are identical.

Spi-nor will pass on the appropriate flash select flag to low level driver,
and it will select pass all the data to that particular flash.

Write operation in parallel mode are performed in page size * 2 chunks as
each write operation results in writing both the flashes. For doubling the
address space each operation is performed at addr/2 flash offset, where addr
is the address specified by the user.

Similarly for read and erase operations it will read from both flashes, so
size and offset are divided by 2 and send to flash.
2024-10-09 09:02:22 -06:00
Venkatesh Yadav Abbarapu
8be3beef44 config: xilinx: Enable the SPI_ADVANCE config option
Enable the SPI_ADVANCE config option for all xilinx platforms, as
this is required for parallel-memories.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
2024-10-09 09:01:54 -06:00
Tom Rini
d892702080 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-08 09:28:10 -06:00
Michal Simek
8ef2deefc5 xilinx: Enable SIMPLE_PM_BUS
Enable simple-pm-bus driver to handle case where axi bus coming between PS
(fixed) part to PL (programmable) part has own clock or power domain.
That's why enable driver to be ready for this configuration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b9f4bb85be502616edf3be2b79e52a0e2c03e821.1725349691.git.michal.simek@amd.com
2024-09-20 08:31:57 +02:00
Venkatesh Yadav Abbarapu
9ae5bbf08a config: Enable the config CONFIG_MMC_SPEED_MODE_SET
Enable setting speed mode using mmc dev commands.
The speed mode is provided as the last argument in these commands
(ex: mmc dev 0 0 10) and is indicated using the index from enum
bus_mode in include/mmc.h. A speed mode can be set if it is enabled
from device tree or from capabilities register

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240708091755.5021-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-08-05 16:10:36 +02:00
Michal Simek
aa815e6c76 xilinx: Enable SMBIOS command
It is good to be aware what information is shared via smbios interface
that's why enable it by default.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-06-20 11:41:42 -06:00
Michal Simek
e4a11e984d xilinx: Enable FF-A for all our arm64 SoCs
Enable FFA_TRANSPORT which also enable FFA command.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5a850b1558fad0f05c61de82110abe4c0e7fd2e4.1718104009.git.michal.simek@amd.com
2024-06-17 16:02:30 +02:00
Michal Simek
5db5b7e2a3 xilinx: Enable NVMEM framework for all platforms
Boards which have for example MAC address in eeprom but not in Xilinx
format (legacy or FRU) could reference it via nvmem cells.
For example:

&gem0 {
	nvmem-cells = <&mac>;
	nvmem-cell-names = "mac-address";
};

&eeprom {
	#address-cells = <1>;
	#size-cells = <1>;
	mac: mac-address@f0 {
		reg = <0xf0 6>;
	};
};

For getting it work above DT changes are required but also CONFIG_NVMEM
should be enabled. That's why enable it by default in generic defconfigs
to be able to use it directly by changing DT only.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9c8ee7a4c7a16367438a92a4c9581bac9d968f84.1712815454.git.michal.simek@amd.com
2024-06-17 16:02:28 +02:00
Marek Vasut
6610375959 net: phy: Replace PHY_ANEG_TIMEOUT with Kconfig symbol
Switch PHY_ANEG_TIMEOUT to CONFIG_PHY_ANEG_TIMEOUT Kconfig symbol.
This removes one more configuration headers option finalizes its
Kconfig symbol conversion. No functional change expected.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-06-13 16:27:07 -06:00
Tom Rini
18e791c404 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-22 17:40:37 -06:00
Tom Rini
19f6576007 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-03-01 09:10:04 -05:00
Michal Simek
98f7bf5da4 arm64: xilinx: Enable EFI_HTTP_BOOT by default
Enable EFI_HTTP_BOOT to be able to booting OS via http.
In case of that dhcp server is not providing dns server IP set it up via
setenv dnsip <ip addr>.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b78a7d8b0100c724f657c0997b273e073cf31a14.1706093917.git.michal.simek@amd.com
2024-02-12 09:28:31 +01:00
Tom Rini
db04ff42c7 mtd: Make CONFIG_MTD be the gate symbol for the menu
The help for CONFIG_MTD explains that it needs to be enabled for various
things like NAND, etc to be available. It however then doesn't enforce
this dependency and so if you have none of these systems present you
still need to disable a number of options. Fix this by making places
that select/imply one type of flash, but did not do the same, also do
this for "MTD". Make boards which hadn't been enabling MTD already but
need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it
wasn't previously enabled but was now being implied.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-22 14:18:54 -05:00
Tejas Bhumkar
3ae0ce7153 xilinx: Enable the NFS command by default
Enabled the default utilization of the NFS command across all Xilinx
platforms to facilitate the booting of images through the network
using the NFS protocol.

Fixes: 10de125707 ("disable NFS support by default")

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/20240104045217.2966454-1-tejas.arvind.bhumkar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-01-09 14:51:04 +01:00
Michal Simek
5c687b2160 xilinx: Enable DNS/WGET and BLKMAP for http boot
Enable DNS/WGET and BLKMAP to be able to download images over HTTP and map
them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4fa9b425459947e6424c8ce27376fdc7a14bf839.1696592702.git.michal.simek@amd.com
2024-01-09 14:51:04 +01:00
Tom Rini
42fb448a20 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-03 09:26:16 -05:00
Michal Simek
46f0408771 arm64: zynqmp: Add support for vck190 revB system controller
There are some changes between revA and revB boards. u39 8T49N240 was
removed and also three ina226 at 42/43/44 addresses (u178/u180/u182).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/461cfe5b2b882365413f90d19efd8abcd6be56ed.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:29 +02:00
Simon Glass
9cbdc3a0fc spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR
Rename this so that SPL is first, as per U-Boot convention. Also add
PAYLOAD_ since this is where in memory the parameters for the payload
have been stored.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:11 -04:00
Simon Glass
82e26e0d68 spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_...
We like to put the SPL first so it is clear that it relates to SPL. Rename
various malloc-related options which have crept in, to stick to this
convention.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-10-06 14:38:11 -04:00
Tom Rini
ec6f06bddc configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-02 13:58:20 -04:00
Venkatesh Yadav Abbarapu
b764e84f9f zynqmp: config: Add proper dependencies for USB
When CONFIG_CMD_USB and CONFIG_USB are disabled, still some compilation
errors are seen as below.

In file included from include/configs/xilinx_zynqmp.h:173,
                 from include/config.h:3,
                 from include/common.h:16,
                 from env/common.c:10:
include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB'
  302 |         BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:302:9: note: in definition of macro
'BOOTENV_DEV_NAME_USB'
  302 |         BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/configs/xilinx_zynqmp.h:77:41: note: in expansion of macro
'BOOTENV_DEV_NAME'
   77 | # define BOOT_TARGET_DEVICES_USB(func)  func(USB, usb, 0)
   func(USB, usb, 1)
      |                                         ^~~~
include/configs/xilinx_zynqmp.h:168:9: note: in expansion of macro
'BOOT_TARGET_DEVICES_USB'
  168 |         BOOT_TARGET_DEVICES_USB(func) \
      |         ^~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:454:25: note: in expansion of macro
'BOOT_TARGET_DEVICES'
  454 |         "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0"
      |                         ^~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:474:9: note: in expansion of macro
'BOOTENV_BOOT_TARGETS'
  474 |         BOOTENV_BOOT_TARGETS \
      |         ^~~~~~~~~~~~~~~~~~~~
include/configs/xilinx_zynqmp.h:179:9: note: in expansion of macro
'BOOTENV'
  179 |         BOOTENV
      |         ^~~~~~~
include/env_default.h:120:9: note: in expansion of macro
'CFG_EXTRA_ENV_SETTINGS'
  120 |         CFG_EXTRA_ENV_SETTINGS
      |         ^~~~~~~~~~~~~~~~~~~~~~
In file included from env/common.c:32:
include/env_default.h:27:36: note: to match this '{'
   27 | const char default_environment[] = {
      |                                    ^
scripts/Makefile.build:256: recipe for target 'env/common.o' failed
make[1]: *** [env/common.o] Error 1
Makefile:1853: recipe for target 'env' failed
make: *** [env] Error 2
make: *** Waiting for unfinished jobs....

Add CONFIG_USB_STORAGE as dependency for USB related macro's such as
BOOT_TARGET_DEVICES_USB() and DFU_DEFAULT_POLL_TIMEOUT and
CONFIG_THOR_RESET_OFF.

Remove CONFIG_ZYNQMP_USB from Kconfig and also from defconfig since it
is not used anywhere else.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230904031528.11817-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:12 +02:00
Venkatesh Yadav Abbarapu
4a5c8e8976 arm64: zynqmp: Enable the config CMD_KASLRSEED
Kernel Address Space Layout Randomization (KASLR) is a hardening
feature that aims to make it more difficult to take advantage
of known exploits in the kernel, by placing kernel data structures
at a random address at each boot.The bootloader supports randomizing
the virtual address at which the kernel image is loaded.
The bootloader must provide entropy by passing a random u64 value
in the /chosen/kaslr-seed device tree node.
When we run "kaslrseed" command from U-Boot, the bootloader will
genarate the kaslr-seed and update the /chosen/kaslr-seed DT property.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230824032712.13399-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:10 +02:00
Tom Rini
a077ac13d0 Kconfigs: Correct default of "0" on hex type entries
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0".  However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-09 09:21:42 -04:00
Tom Rini
df8967435a configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-07 15:17:12 -04:00
Ashok Reddy Soma
e0406f35e1 arm64: zynqmp: Enable ADIN ethernet phy
Some of the Kria SOM and ZynqMP boards are using Analog Devices ethernet
phy. So, enable CONFIG_PHY_ADIN for all ZynqMP platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230420085645.21260-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-05-15 09:33:57 +02:00
Michal Simek
9c10a69e10 xilinx: Enable virtio mmio transport and devices
Qemu can create virtio mmio transports and passing devices through it
that's why enable virtio by default on all arm64 based SoCs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a2ee18e7e8c1881ce72c5cd13127794a02410696.1679583129.git.michal.simek@amd.com
2023-05-15 09:33:55 +02:00
Tom Rini
c960c0fd38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-01 11:50:26 -04:00
Tom Rini
605bc145f9 Merge branch 'master' into next 2023-03-27 15:19:57 -04:00
Tom Rini
c358af81d0 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-27 13:39:17 -04:00
Michal Simek
5544a5c7c5 xilinx: Enable SMC command for arm64 targets
SMC command is very useful for TF-A testing or issuing commands which are
not covered by any driver. Strongly recommend to disable this command on
any product unless it is required.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/23c77a2cbd083963ca17b84de4108dbb1f28597f.1676450712.git.michal.simek@amd.com
2023-03-09 13:15:00 +01:00
Tom Rini
fcb5117da8 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 09:58:06 -05:00
Victor Lim
be44bf6305 arm64: zynqmp: enable gigadevice
enabling gigadevice in the related files

Signed-off-by: Victor Lim <vlim@gigadevice.com>
Link: https://lore.kernel.org/r/20230109234946.14540-4-vlim@gigadevice.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-10 12:37:02 +01:00
Tom Rini
60910a3f02 Convert CONFIG_THOR_RESET_OFF to Kconfig
This converts the following to Kconfig:
   CONFIG_THOR_RESET_OFF

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Michal Simek
2e3c10eea0 xilinx: Remove unused ZYNQ_MAC_IN_EEPROM/ZYNQ_GEM_I2C_MAC_OFFSET entries
The commit ba74bcf3e0 ("xilinx: common: Remove
zynq_board_read_rom_ethaddr()") removed zynq_board_read_rom_ethaddr()
because xlnx,eeprom link via DT chosen node is no longer used. But forget
to remove Kconfig entries which are used by this code only.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f97451ed33409838efea4071553b6da795cfc578.1669192026.git.michal.simek@amd.com
2022-12-05 08:55:55 +01:00
Michal Simek
7b84fe7684 arm64: zynqmp: Disable watchdog by default for virt platform
Disable watchdog based on request in past that not all Linux rootfs have
proper utilities ready to service it. Enable it if your rootfs have proper
watchdog handling.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/62dfc08f32635abee42feab26aaa9efed52134c0.1665567328.git.michal.simek@amd.com
2022-11-22 15:02:07 +01:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Simon Glass
b86986c7b3 video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO
Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
b95125e480 treewide: Stop enabling CONFIG_LCD
This option is not used anymore since the LCD implementation is being
removed. Stop enabling it on various boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Michal Simek
a27278f054 xilinx: Enable CMD_GREPENV/SETEXPR by default
Enable both of these commands in Xilinx SoCs to be able to use them in boot
scripts.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1a612be7e09e9bc502f30e1f025441ccf8accba5.1661340513.git.michal.simek@amd.com
2022-09-13 11:32:48 +02:00
T Karthik Reddy
ce8808628e xilinx: Add env redund offset
ENV_OFFSET_REDUND config is by default set to 0 for flashes. Saving the env
variables is overwriting data at 0 offset, which is wrong. So add default
redund env offset for Zynq, ZynqMP, Versal and microblaze platforms.
Configured ENV_OFFSET_REDUND offsets by ENV_OFFSET + (2 * ENV_SIZE).

In case of versal, we configured ENV_OFFSET_REDUND at 0x7F00000 instead
of 0x7F80000. As BOOT_SCRIPT_OFFSET is already configured at 0x7F80000.

Added ENV_OFFSET_REDUND in Kconfig for microblaze due to dependency of
ENV_IS_IN_SPI_FLASH config.

Below table specifies platform specific env and env redund offsets.

PLAT		ENV_OFFSET	ENV_OFFSET_REDUND
----		----------	-----------------
ZYNQ		0xE0000		0xE40000
ZYNQMP		0x1E00000	0x1E80000
VERSAL		0x7F40000	0x7F00000
MICROBLAZE	0x1080000	0x10C0000

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/92656dc08f0f5a749d62b71ca6e77fe1be72e9e0.1661340204.git.michal.simek@amd.com
2022-09-13 11:32:48 +02:00
Ashok Reddy Soma
7b4e365e49 arm64: zynqmp: Enable power domain driver
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-4-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:15 +02:00
Ashok Reddy Soma
9dac63b6f4 arm64: zynqmp: Enable reset driver
Enable reset driver for ZynqMP platforms. This will enable us to reset
the IP's using generic reset_assert and reset_deassert calls.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:28:32 +02:00
Michal Simek
e3521e9c69 arm64: zynqmp: Enable SLG gpo driver by default
This device is used on SOM CCs that's why enable it by default.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ebbfc0c883ca7d4f70c75d8d3655aaa6a81d77be.1656943737.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00