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net: phy: Replace PHY_ANEG_TIMEOUT with Kconfig symbol
Switch PHY_ANEG_TIMEOUT to CONFIG_PHY_ANEG_TIMEOUT Kconfig symbol. This removes one more configuration headers option finalizes its Kconfig symbol conversion. No functional change expected. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
parent
4031a4299c
commit
6610375959
116 changed files with 75 additions and 89 deletions
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@ -74,6 +74,7 @@ CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x180000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_GIGE=y
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CONFIG_MII=y
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CONFIG_DRIVER_TI_CPSW=y
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@ -50,6 +50,7 @@ CONFIG_DFU_SF=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_MMC_OMAP_HS=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_MII=y
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CONFIG_DRIVER_TI_CPSW=y
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CONFIG_POWER_TPS65218=y
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@ -64,6 +64,7 @@ CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x180000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_GIGE=y
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CONFIG_MII=y
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CONFIG_DRIVER_TI_CPSW=y
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@ -77,6 +77,7 @@ CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x180000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_GIGE=y
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CONFIG_MII=y
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CONFIG_DRIVER_TI_CPSW=y
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@ -70,6 +70,7 @@ CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x180000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_GIGE=y
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CONFIG_MII=y
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CONFIG_DRIVER_TI_CPSW=y
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@ -51,6 +51,7 @@ CONFIG_DFU_SF=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_MMC_OMAP_HS=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_MII=y
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CONFIG_DRIVER_TI_CPSW=y
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CONFIG_POWER_TPS65218=y
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@ -94,6 +94,7 @@ CONFIG_HSMMC2_8BIT=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_MII=y
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@ -90,6 +90,7 @@ CONFIG_HSMMC2_8BIT=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_MII=y
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@ -88,6 +88,7 @@ CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_MII=y
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@ -99,6 +99,7 @@ CONFIG_SYS_MXC_I2C3_SPEED=400000
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ANEG_TIMEOUT=15000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_FEC_MXC=y
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@ -64,6 +64,7 @@ CONFIG_MMC_SDHCI_MV=y
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CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -65,6 +65,7 @@ CONFIG_MMC_SDHCI_MV=y
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CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -65,6 +65,7 @@ CONFIG_MMC_SDHCI_MV=y
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CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -85,6 +85,7 @@ CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_BITBANGMII=y
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CONFIG_BITBANGMII_MULTI=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -64,6 +64,7 @@ CONFIG_MISC=y
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# CONFIG_MMC is not set
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVPP2=y
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@ -71,6 +71,7 @@ CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -75,6 +75,7 @@ CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -68,6 +68,7 @@ CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_MV=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -70,6 +70,7 @@ CONFIG_NAND_PXA3XX=y
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CONFIG_SYS_NAND_ONFI_DETECTION=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -71,6 +71,7 @@ CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MVTWSI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -68,6 +68,7 @@ CONFIG_SYS_I2C_MVTWSI=y
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# CONFIG_MMC is not set
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ADDR_ENABLE=y
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CONFIG_PHY_ANEG_TIMEOUT=16000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -64,6 +64,7 @@ CONFIG_MMC_SDHCI_MV=y
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CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -68,6 +68,7 @@ CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_BITBANGMII=y
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CONFIG_BITBANGMII_MULTI=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_REALTEK=y
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CONFIG_RENESAS_RAVB=y
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CONFIG_DM_REGULATOR=y
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@ -61,6 +61,8 @@ CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_MSM=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY=y
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CONFIG_PINCTRL=y
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CONFIG_PINCONF=y
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@ -124,6 +124,7 @@ CONFIG_SPL_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ADDR_ENABLE=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_PHY_FIXED=y
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@ -193,6 +193,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_ATHEROS=y
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CONFIG_PHY_BROADCOM=y
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CONFIG_DM_MDIO=y
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@ -87,6 +87,7 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_DWC_ETH_QOS=y
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@ -113,6 +113,7 @@ CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_ATMEL=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_DM_ETH_PHY=y
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@ -206,6 +206,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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# CONFIG_SPI_FLASH_UNLOCK_ALL is not set
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_ATHEROS=y
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CONFIG_PHY_BROADCOM=y
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CONFIG_PHY_MICREL=y
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@ -76,6 +76,7 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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@ -201,6 +201,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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# CONFIG_SPI_FLASH_UNLOCK_ALL is not set
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_PHY_SMSC=y
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@ -208,6 +208,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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# CONFIG_SPI_FLASH_UNLOCK_ALL is not set
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_PHY_SMSC=y
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@ -93,6 +93,7 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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@ -126,6 +126,7 @@ CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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@ -127,6 +127,7 @@ CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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@ -74,6 +74,7 @@ CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ8XXX=y
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CONFIG_FEC_MXC=y
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@ -98,6 +98,7 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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@ -95,6 +95,7 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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@ -112,6 +112,7 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_ADIN=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_PHY_REALTEK=y
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@ -81,6 +81,7 @@ CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ANEG_TIMEOUT=10000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ8XXX=y
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@ -57,6 +57,7 @@ CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ANEG_TIMEOUT=10000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ8XXX=y
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@ -83,6 +83,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_TI=y
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CONFIG_PHY_GIGE=y
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CONFIG_FEC_MXC=y
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@ -77,6 +77,7 @@ CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MSCC=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_ETH_DESIGNWARE=y
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@ -53,6 +53,7 @@ CONFIG_SYS_I2C_MVTWSI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ANEG_TIMEOUT=8000
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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@ -85,6 +85,7 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_TI=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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@ -75,6 +75,7 @@ CONFIG_NAND_PXA3XX=y
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CONFIG_SYS_NAND_ONFI_DETECTION=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=8000
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_MVNETA=y
|
||||
|
|
|
@ -63,6 +63,7 @@ CONFIG_SPI_FLASH_ATMEL=y
|
|||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=8000
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -67,6 +67,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -72,6 +72,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -75,6 +75,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -68,6 +68,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -89,6 +89,7 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -86,6 +86,7 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -61,6 +61,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -64,6 +64,7 @@ CONFIG_MTD=y
|
|||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHYLIB_10G=y
|
||||
CONFIG_PHY_MARVELL_10G=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -60,6 +60,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -60,6 +60,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -92,6 +92,7 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -90,6 +90,7 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
|
|
|
@ -66,6 +66,7 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_ATHEROS=y
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
|
|
|
@ -68,6 +68,7 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_BITBANGMII_MULTI=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_RENESAS_RAVB=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
|
|
|
@ -67,6 +67,7 @@ CONFIG_MMC_DW=y
|
|||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=8000
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_ETH_DESIGNWARE=y
|
||||
|
|
|
@ -133,6 +133,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_KS8851_MLL=y
|
||||
CONFIG_PHY=y
|
||||
|
|
|
@ -131,6 +131,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
|||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
|
|
|
@ -78,6 +78,7 @@ CONFIG_SYS_I2C_MVTWSI=y
|
|||
# CONFIG_MMC is not set
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=8000
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_MVNETA=y
|
||||
|
|
|
@ -96,6 +96,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
|
|||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=8000
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_DSA=y
|
||||
|
|
|
@ -101,6 +101,7 @@ CONFIG_SPI_FLASH_SST=y
|
|||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_PHY_NATSEMI=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
|
|
|
@ -102,6 +102,7 @@ CONFIG_SPI_FLASH_SST=y
|
|||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_ADIN=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_PHY_NATSEMI=y
|
||||
|
|
|
@ -158,6 +158,7 @@ CONFIG_DM_MTD=y
|
|||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_ADIN=y
|
||||
CONFIG_PHY_TI_DP83867=y
|
||||
CONFIG_PHY_XILINX_GMII2RGMII=y
|
||||
|
|
|
@ -169,6 +169,7 @@ CONFIG_SPI_FLASH_SST=y
|
|||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_ADIN=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_PHY_MICREL=y
|
||||
|
|
|
@ -566,9 +566,9 @@ int aquantia_startup(struct phy_device *phydev)
|
|||
if ((i++ % 500) == 0)
|
||||
printf(".");
|
||||
} while (!aquantia_link_is_up(phydev) &&
|
||||
i < (4 * PHY_ANEG_TIMEOUT));
|
||||
i < (4 * CONFIG_PHY_ANEG_TIMEOUT));
|
||||
|
||||
if (i > PHY_ANEG_TIMEOUT)
|
||||
if (i > CONFIG_PHY_ANEG_TIMEOUT)
|
||||
printf(" TIMEOUT !\n");
|
||||
}
|
||||
|
||||
|
|
|
@ -250,7 +250,7 @@ int genphy_update_link(struct phy_device *phydev)
|
|||
/*
|
||||
* Timeout reached ?
|
||||
*/
|
||||
if (i > (PHY_ANEG_TIMEOUT / 50)) {
|
||||
if (i > (CONFIG_PHY_ANEG_TIMEOUT / 50)) {
|
||||
printf(" TIMEOUT !\n");
|
||||
phydev->link = 0;
|
||||
return -ETIMEDOUT;
|
||||
|
|
|
@ -361,7 +361,7 @@ static int pcs_pma_startup(struct axidma_priv *priv)
|
|||
* and the external PHY is not obtained.
|
||||
*/
|
||||
debug("axiemac: waiting for link status of the PCS/PMA PHY");
|
||||
while (retry_cnt * 10 < PHY_ANEG_TIMEOUT) {
|
||||
while (retry_cnt * 10 < CONFIG_PHY_ANEG_TIMEOUT) {
|
||||
rc = phyread(priv, priv->pcsaddr, MII_BMSR, &mii_reg);
|
||||
if ((mii_reg & BMSR_LSTATUS) && mii_reg != 0xffff && !rc) {
|
||||
debug(".Done\n");
|
||||
|
|
|
@ -102,8 +102,6 @@
|
|||
|
||||
#endif
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
|
||||
|
||||
/* NAND support */
|
||||
#ifdef CONFIG_MTD_RAW_NAND
|
||||
/* NAND: device related configs */
|
||||
|
|
|
@ -36,7 +36,6 @@
|
|||
#include <configs/ti_omap5_common.h>
|
||||
|
||||
/* CPSW Ethernet */
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
|
||||
|
||||
/*
|
||||
* Default to using SPI for environment, etc.
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
#define CFG_SYS_FSL_USDHC_NUM 3
|
||||
|
||||
/* Network */
|
||||
#define PHY_ANEG_TIMEOUT 15000 /* PHY needs longer aneg time */
|
||||
|
||||
/* USB Configs */
|
||||
/* Host */
|
||||
|
|
|
@ -26,8 +26,6 @@
|
|||
* image and environment
|
||||
*/
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/* Keep device tree and initrd in lower memory so the kernel can access them */
|
||||
#define RELOCATION_LIMITS_ENV_SETTINGS \
|
||||
"fdt_high=0x10000000\0" \
|
||||
|
|
|
@ -15,8 +15,6 @@
|
|||
|
||||
/* Environment in SPI NOR flash */
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/*
|
||||
* Environment Configuration
|
||||
*/
|
||||
|
|
|
@ -23,8 +23,6 @@
|
|||
|
||||
/* Environment in SPI NOR flash */
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/*
|
||||
* mv-common.h should be defined after CMD configs since it used them
|
||||
* to enable certain macros
|
||||
|
|
|
@ -12,8 +12,6 @@
|
|||
|
||||
/* Environment in SPI NOR flash */
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/* NAND */
|
||||
|
||||
/* Keep device tree and initrd in lower memory so the kernel can access them */
|
||||
|
|
|
@ -15,8 +15,6 @@
|
|||
|
||||
/* Environment in SPI NOR flash */
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/* Keep device tree and initrd in lower memory so the kernel can access them */
|
||||
#define CFG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0x10000000\0" \
|
||||
|
|
|
@ -19,8 +19,6 @@
|
|||
|
||||
/* Environment in SPI NOR flash */
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/* NAND */
|
||||
|
||||
/*
|
||||
|
|
|
@ -7,8 +7,6 @@
|
|||
#ifndef _CONFIG_DS116_H
|
||||
#define _CONFIG_DS116_H
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/* Keep device tree and initrd in lower memory so the kernel can access them */
|
||||
#define RELOCATION_LIMITS_ENV_SETTINGS \
|
||||
"fdt_high=0x10000000\0" \
|
||||
|
|
|
@ -55,6 +55,5 @@
|
|||
|
||||
|
||||
/* increase autoneg timeout, my NIC sucks */
|
||||
#define PHY_ANEG_TIMEOUT 16000
|
||||
|
||||
#endif /* _CONFIG_SYNOLOGY_DS414_H */
|
||||
|
|
|
@ -26,8 +26,6 @@
|
|||
* image and environment
|
||||
*/
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/* Keep device tree and initrd in lower memory so the kernel can access them */
|
||||
#define RELOCATION_LIMITS_ENV_SETTINGS \
|
||||
"fdt_high=0x10000000\0" \
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
#define __CONFIGS_HMIBSC_H
|
||||
|
||||
/* PHY needs a longer aneg time */
|
||||
#define PHY_ANEG_TIMEOUT 8000
|
||||
|
||||
#define CFG_ENV_FLAGS_LIST_STATIC "BOOT_A_LEFT:dw,BOOT_B_LEFT:dw,BOOT_ORDER:sw"
|
||||
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
#include <configs/verdin-imx8mm.h>
|
||||
|
||||
/* PHY needs a longer autoneg timeout */
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
/* Custom initial environment variables */
|
||||
#undef CFG_EXTRA_ENV_SETTINGS
|
||||
|
|
|
@ -28,7 +28,6 @@
|
|||
#define CFG_MXC_UART_BASE UART3_BASE_ADDR
|
||||
|
||||
/* PHY needs a longer autonegotiation timeout after reset */
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
/* USDHC */
|
||||
#define CFG_SYS_FSL_USDHC_NUM 2
|
||||
|
|
|
@ -10,10 +10,6 @@
|
|||
|
||||
#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
#endif
|
||||
|
||||
/* Link Definitions */
|
||||
|
||||
#define CFG_SYS_INIT_RAM_ADDR 0x40000000
|
||||
|
|
|
@ -21,7 +21,6 @@
|
|||
#define CFG_MXC_UART_BASE UART3_BASE_ADDR
|
||||
|
||||
/* PHY needs a longer autonegotiation timeout after reset */
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
#define FEC_QUIRK_ENET_MAC
|
||||
|
||||
#define CFG_EXTRA_ENV_SETTINGS \
|
||||
|
|
|
@ -16,8 +16,6 @@
|
|||
#if defined(CONFIG_CMD_NET)
|
||||
#define CFG_FEC_MXC_PHYADDR 1
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
#endif
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
|
|
|
@ -21,7 +21,6 @@
|
|||
#define CFG_MXC_UART_BASE UART1_BASE_ADDR
|
||||
|
||||
/* PHY needs a longer autonegotiation timeout after reset */
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
#define FEC_QUIRK_ENET_MAC
|
||||
|
||||
/* USDHC */
|
||||
|
|
|
@ -15,8 +15,6 @@
|
|||
#if defined(CONFIG_CMD_NET)
|
||||
#define CFG_FEC_MXC_PHYADDR 1
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
#endif
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
|
|
|
@ -18,8 +18,6 @@
|
|||
|
||||
#define DWC_NET_PHYADDR 1
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
#endif
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
|
|
|
@ -35,8 +35,6 @@
|
|||
#if defined(CONFIG_CMD_NET)
|
||||
#define CFG_FEC_MXC_PHYADDR 4
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_CMD_MMC)
|
||||
|
|
|
@ -19,8 +19,6 @@
|
|||
|
||||
/* ENET Config */
|
||||
#if defined(CONFIG_FEC_MXC)
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
#define CFG_FEC_MXC_PHYADDR 1
|
||||
#endif
|
||||
|
||||
|
|
|
@ -134,8 +134,4 @@
|
|||
/* Using ULP WDOG for reset */
|
||||
#define WDOG_BASE_ADDR WDG3_BASE_ADDR
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -41,8 +41,4 @@
|
|||
/* Using ULP WDOG for reset */
|
||||
#define WDOG_BASE_ADDR WDG3_BASE_ADDR
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -11,7 +11,6 @@
|
|||
|
||||
/* Network */
|
||||
#define CFG_KSNET_CPSW_NUM_PORTS 2
|
||||
#define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */
|
||||
|
||||
#include <configs/ti_armv7_keystone2.h>
|
||||
|
||||
|
|
|
@ -26,8 +26,6 @@
|
|||
#if defined(CONFIG_CMD_NET)
|
||||
#define CFG_FEC_MXC_PHYADDR 0
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
|
||||
#endif
|
||||
|
||||
#define ENV_MEM_LAYOUT_SETTINGS \
|
||||
|
|
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Add table
Reference in a new issue