Commit graph

92656 commits

Author SHA1 Message Date
Caleb Connolly
60b306e12f
clk/qcom: add driver for sm6115 GCC
Add a driver for the clock controller in the SM6115 SoC, this is used in
the QRB4210 RB2 board.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:04 +02:00
Caleb Connolly
c78210fce7
clk/qcom: add driver for qcm2290 GCC
Add a clock driver for the QCM2290 SoC which is used in the QRB2210 RB1
board.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:04 +02:00
Neil Armstrong
2cb8aebfd2
button: qcom-pmic: add support for pmk8350 button configs
Finally add the entries for the qcom,pmk8350-pwrkey and qcom,pmk8350-resin
found on PMICs used with SM8350 and later SoCs.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:03 +02:00
Neil Armstrong
e3abf220f1
button: qcom-pmic: move node name checks to btn_data struct
Move node name checks to a proper data struct with all information
for the supported subnodes.

Replace the key offset defines with the Linux driver ones.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:02 +02:00
Neil Armstrong
b6f1d33532
gpio: qcom_pmic_gpio: add support for pm8550-gpio
Add support for PM8550 GPIO controller variant, keep read-only
until the GPIO and Pinctrl setup is fixed for new PMICs.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:02 +02:00
Caleb Connolly
372dd39347
qcom_defconfig: enable pinctrl for new qcm2290/sm6115/sm8250
Enable the clock and pinctrl drivers for qcm2290, sm6115, and sm8250.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:01 +02:00
Caleb Connolly
9cb6fb7e5b
pinctrl: qcom: add sm8250 pinctrl driver
This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:01 +02:00
Caleb Connolly
aeb95a4be0
pinctrl: qcom: add sm6115 pinctrl driver
This SoC features a pinctrl block with west, east, and south tiles.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:00 +02:00
Caleb Connolly
0ecb8cfcb9
pinctrl: qcom: add qcm2290 pinctrl driver
This SoC has a basic pinctrl block with no tiles.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:00 +02:00
Neil Armstrong
07b71b5f7d
qcom_defconfig: enable SM8550 & SM8650 pinctrl driver
Enable the SM8550 & SM8650 pinctrl drivers for Qualcomm defconfig.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:28:59 +02:00
Neil Armstrong
610d78915e
pinctrl: qcom: Add SM8650 pinctrl driver
Add pinctrl driver for the TLMM block found in the SM8650 SoC.

This driver only handles the gpio and qup2_se7 pinmux, and makes sure
the pinconf applies on SDC2 pins.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:28:59 +02:00
Neil Armstrong
ba0df20fd3
pinctrl: qcom: Add SM8550 pinctrl driver
Add pinctrl driver for the TLMM block found in the SM8550 SoC.

This driver only handles the gpio and qup1_se7 pinmux, and makes sure
the pinconf applies on SDC2 pins.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:28:58 +02:00
Neil Armstrong
5725681e30
qcom_defconfig: enable the Qualcomm Synopsys eUSB2 PHY driver
Enable the Qualcomm Synopsys eUSB2 PHY driver in Qualcomm defconfig.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:28:57 +02:00
Neil Armstrong
6947939b62
phy: qcom: add Synopsys eUSB2 PHY driver
Add a driver for the new Synopsys eUSB2 PHY found in the SM8550
and SM8650 SoCs.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:28:56 +02:00
Tom Rini
38ea74d6d5 Prepare v2024.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-22 15:10:21 -06:00
Tom Rini
230a1dd608 Merge patch series "configs: apple: Switch to standard boot + small adjustments"
Janne Grunau <j@jannau.net> says:

This series contains a few misc config changes for Apple silicon
systems:
- switch from the deprecated distro boot scripts to standard boot
- allows EFI console resizing based on the video console size
- enables 16x32 bitmap fonts as Apple devices come with high DPI
  displays
- enables 64-bit LBA addressing
2024-04-22 11:02:16 -06:00
Janne Grunau
63334ca9b5 arm: apple: Do not list bootflows on boot
The bootflow list is only seen briefly and is probably more confusing
than helpful.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2024-04-22 11:02:08 -06:00
Janne Grunau
f1972dd73f arm: apple: Switch to standard boot
Use standard boot instead of the distro boot scripts. Use
BOOTSTD_FULL instead of BOOTSTD_DEFAULTS for easier interactive use.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
2024-04-22 11:02:08 -06:00
Janne Grunau
59f5ce836d configs: apple: Enable CMD_SELECT_FONT and FONT_16X32
Apple devices have high DPI displays so the larger fonts are preferable
for improved readability. This does not yet change the used font based
on the display's pixel density so the standard 8x16 font is still used
by default.

Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
2024-04-22 11:02:08 -06:00
Janne Grunau
9d189ab3f9 configs: apple: Use "vidconsole,serial" as stdout/stderr
The display size querying in efi_console relies on this order. The
display should be the primary output device and should be used to
display more than 80x25 chars.

Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
2024-04-22 11:02:08 -06:00
Hector Martin
35361d8b45 apple_m1_defconfig: Turn on CONFIG_SYS_64BIT_LBA
This makes USB HDDs >2TiB work. The only reason this hasn't bitten us
for the internal NVMe yet is the 4K sector size, because the largest SSD
Apple sells is 8TB and we can handle up to 16TiB with that sector size.
Close call.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
2024-04-22 11:02:08 -06:00
Tom Rini
9552923ded Merge patch series "Kconfig: some cleanups"
Michal Simek <michal.simek@amd.com> says:

I looked as cleaning up some dependencies and I found that qconfig is
reporting some issues. This series is fixing some of them. But there are
still some other pending. That's why please go and fix them if they are
related to your board.

UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in
a loop you will find some other issue with copyright chars or some issues
in files taken from the Linux kernel like DTs. They should be likely fixed
in the kernel first.
Based on discussion I am ignoring names too.
2024-04-22 11:01:56 -06:00
Michal Simek
81f3a665ab common: Convert *.c/h from UTF-8 to ASCII enconfing
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <kabel@kernel.org>
2024-04-22 11:01:48 -06:00
Michal Simek
5a6cf7c5d5 Kconfig: Make all Kconfig encoding ascii
Some of Kconfigs are using utf-8 encoding because of used chars. Convert
all of them to ascii enconging. Based on discussion ASCII should be used in
general with the exception of names.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-04-22 11:01:48 -06:00
Michal Simek
99ac431c09 Kconfig: Add missing quotes around default string value
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: style: quotes recommended around default value for string symbol
EFI_VAR_SEED_FILE (defined at lib/efi_loader/Kconfig:130)

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-04-22 11:01:48 -06:00
Michal Simek
953d335d39 Kconfig: Add missing quotes around source file
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
drivers/crypto/Kconfig:9: warning: style: quotes recommended around
'drivers/crypto/nuvoton/Kconfig' in 'source drivers/crypto/nuvoton/Kconfig'

Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-04-22 11:01:48 -06:00
Michal Simek
d20bcbaa65 Kconfig: Remove trailing whitespace in its prompt
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: SPL_CLK_CCF (defined at drivers/clk/Kconfig:59) has leading or
trailing whitespace in its prompt

Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-04-22 11:01:48 -06:00
Tom Rini
9fa8ba1ee1 doc: release_cycle: Note when next branch opens
While I have said this in various release emails, it should be
documented here as well that the next branch opens with the second
release candidate.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-22 11:01:37 -06:00
Tom Rini
c18ead4ba7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Not many and nothing really exciting this time: there are more patches
in fly, but they are not ready yet.  I will also send some DT updates
and new board defconfig files later, once they have seen the list. I am
aware of the USB rebasing repo efforts, but would like to see how this
plays out, also we have one compatibility issue that I painstakingly
work around in the U-Boot tree for the last three years or so. So for
now I stick to the previous approach.

So now just some easy changes: support for USB peripheral mode on the
Allwinner F1C100s, T113-s3 SPI boot support, and some SPL cleanup
patches.

The branch passed the gitlab CI run, and brief boot testing on some
boards didn't turn up any issues.
2024-04-22 10:24:34 -06:00
Tom Rini
0eb249748e Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra 2024-04-22 10:23:29 -06:00
Svyatoslav Ryhel
00d847def6 board: tegra30: switch to button cmd
Use recently added ability to assign commands to buttons via env.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 10:23:23 -06:00
Svyatoslav Ryhel
1c559d6fc5 ARM: tegra: transformer-t30: bind Hall sensor
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:21 +03:00
Svyatoslav Ryhel
6df3d1e0fc ARM: tegra: grouper: bind Hall sensor
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:21 +03:00
Svyatoslav Ryhel
d1db2733a5 board: asus: tf700t: bind tc358768 bridge and panel
Of all T30 transformers, only the TF700T has a FullHD DSI panel,
which is connected via tc358768 RGB to DSI bridge. Since the
bridge driver is available now, TF700T can have video support.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
534b79a07e board: asus: transformer-t30: enable I2C_MUX only for TF700T
Of all T30 transformers, only the TF700T uses GPIO i2c muxing
for one of the i2c lines and needs this driver to properly work.
Disable this configuration for all transformers except tf700t
in their fragments.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
a53c108d4c board: asus: tf600t: enable TEGRA20_SLINK only for TF600T
Of all T30 transformers, only the TF600T uses SPI flash and
needs SLINK driver to work with it. Move this configuration
to the tf600t fragment from common defconfig.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Jonas Schwöbel
e336a86834 ARM: tegra: Enable UART-E for T20 and T30
T20 and T30 have 5 UARTs, while T114+ have only 4. Fix this by
adding missing UARTE Kconfig for T20/T30.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
12b344ad6b board: asus: transformer-t30: set the correct pinmux lock and io-reset
For lock and io-reset pins 0 is the default value, while 1 is disabled
and 2 is enabled. This should be corrected to avoid regressions.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
fc48456e63 board: asus: tf600t: adjust LV pinmux
TF600T is pretty picky in terms of LV pinmux configuration.
The wrong setup will cause issues with eMMC and video.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
edad9f6b55 board: asus: tf600t: configure SPI pinmux
Unlike all other transformers, TF600T has an SPI flash to store
boot firmware and requires precise SPI pinmux configuration.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Jonas Schwöbel
ed5b2b105e board: asus: lg_x3: endeavoru: remove CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_L2CACHE_OFF is not affecting these devices in any way.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
745ca4900f board: tegra30: switch to standard boot
Switch transformer, endeavoru, grouper and x3_t30 boards
to bootflow scan.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
2bd07c1fb8 ARM: tegra: move to standard boot
Drop the distro-boot scripts and use standard boot instead.

Inspired by:
'commit 7755dc58af ("rockchip: Move to standard boot")'

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
eed7fa1372 ARM: dts: paz00: remove display-timings node
Paz00 can have multiple panels with different timings, but they
all share common feature - panel exposes EDID.

Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Andre Przywara
192c5c9e51 sunxi: sun9i: make more clock functions SPL only
In clock_sun9i.c, responsible for (mostly early) clock setup on the
Allwinner A80 SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM, and
they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Move some functions around, to group all SPL-only function within
one #ifdef guard. Some functions were exported, but never used outside
of this file, so remove their prototypes from the header file and mark
them as static.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
25f07d2cc3 sunxi: sun8i_a83t: make more clock functions SPL only
In clock_sun8i_a83t.c, responsible for (mostly early) clock setup on the
Allwinner A83T SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
c209a7163a sunxi: sun50i_h6: make more clock functions SPL only
In clock_sun50i_h6.c, responsible for (mostly early) clock setup on
newer generation Allwinner SoCs, many functions are only needed by the
SPL, and are thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only. By moving the clock_get_pll6()
function to the end of the file, all SPL-only clocks can be contained
within one #ifdef guard.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
58bf089999 sunxi: sun6i: make more clock functions SPL only
In clock_sun6i.c, responsible for (mostly early) clock setup on older
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
a2b2a47a16 sunxi: sun4i: make more clock functions SPL only
In clock_sun4i.c, responsible for (mostly early) clock setup on early
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
8cb3c49454 sunxi: compile clock.c for SPL only
With the clock_twi_onoff() function now being called only from the SPL,
the whole clock.c file in arch/arm/mach-sunxi is needed by SPL code
only.

Remove the redundant #ifdef from the clock_init() function, actually
this function was already only called from the SPL.
Then adjust the Makefile to compile clock.c only with CONFIG_SPL_BUILD
defined.

This avoids unnecessary code in U-Boot proper and allows further
refactoring and code-split between the SPL and U-Boot proper.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:25 +01:00