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Prepare v2024.10-rc3

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Merge tag 'v2024.10-rc3' into next

Prepare v2024.10-rc3
This commit is contained in:
Tom Rini 2024-08-19 18:24:58 -06:00
commit 158cf0270c
304 changed files with 14534 additions and 8494 deletions
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2
MAINTAINERS
View file

@ -732,6 +732,7 @@ F: arch/arm/mach-omap2/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/
F: board/ti/
F: doc/board/ti/
F: drivers/dma/ti*
F: drivers/dma/ti*/
F: drivers/firmware/ti_sci.*
@ -1648,6 +1649,7 @@ F: arch/arm/mach-omap2/sec-common.c
F: arch/arm/mach-omap2/config_secure.mk
F: arch/arm/mach-k3/security.c
F: configs/am335x_hs_evm_defconfig
F: configs/am335x_hs_evm_spi_defconfig
F: configs/am335x_hs_evm_uart_defconfig
F: configs/am43xx_hs_evm_defconfig
F: configs/am43xx_hs_evm_qspi_defconfig

4
Makefile
View file

@ -3,7 +3,7 @@
VERSION = 2024
PATCHLEVEL = 10
SUBLEVEL =
EXTRAVERSION = -rc2
EXTRAVERSION = -rc3
NAME =
# *DOCUMENTATION*
@ -1841,7 +1841,7 @@ ENV_FILE := $(if $(ENV_SOURCE_FILE),$(ENV_FILE_CFG),$(wildcard $(ENV_FILE_BOARD)
quiet_cmd_gen_envp = ENVP $@
cmd_gen_envp = \
if [ -s "$(ENV_FILE)" ]; then \
$(CPP) -P $(CFLAGS) -x assembler-with-cpp -undef \
$(CPP) -P $(cpp_flags) -x assembler-with-cpp -undef \
-D__ASSEMBLY__ \
-D__UBOOT_CONFIG__ \
-I . -I include -I $(srctree)/include \

5
arch/arm/dts/Makefile
View file

@ -678,6 +678,7 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \
sun50i-h6-tanix-tx6.dtb \
sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
sun50i-h313-tanix-tx1.dtb \
sun50i-h616-orangepi-zero2.dtb \
sun50i-h618-orangepi-zero2w.dtb \
sun50i-h618-orangepi-zero3.dtb \
@ -763,8 +764,6 @@ dtb-y += \
imx6dl-icore.dtb \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-mba6a.dtb \
imx6dl-mba6b.dtb \
imx6dl-mamoj.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-pico.dtb \
@ -814,8 +813,6 @@ dtb-y += \
imx6q-kp.dtb \
imx6q-logicpd.dtb \
imx6q-marsboard.dtb \
imx6q-mba6a.dtb \
imx6q-mba6b.dtb \
imx6q-mccmon6.dtb\
imx6q-nitrogen6x.dtb \
imx6q-novena.dtb \

11
arch/arm/dts/amd-versal2-mini.dts Normal file
View file

@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Empty device tree for amd-versal2-mini
*
* Copyright (C) 2024, Advanced Micro Devices, Inc.
*/
/dts-v1/;
/ {
};

3
arch/arm/dts/imx6dl-mba6b-u-boot.dtsi Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: GPL-2.0
#include "imx6qdl-mba6-u-boot.dtsi"

21
arch/arm/dts/imx6dl-mba6b.dts
View file

@ -1,21 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2013 Sascha Hauer, Pengutronix
*
* Copyright 2013-2021 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6dl-tqma6b.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6b.dtsi"
#include "imx6dl-mba6.dtsi"
/ {
model = "TQ TQMa6S/DL on MBa6x";
compatible = "tq,imx6dl-mba6x-b", "tq,mba6b",
"tq,imx6dl-tqma6dl-b", "fsl,imx6dl";
};

16
arch/arm/dts/imx6dl-tqma6a.dtsi
View file

@ -1,16 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Sascha Hauer, Pengutronix
* Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6dl.dtsi"
#include "imx6qdl-tqma6a.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x20000000>;
};
};

16
arch/arm/dts/imx6dl-tqma6b.dtsi
View file

@ -1,16 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Sascha Hauer, Pengutronix
* Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6dl.dtsi"
#include "imx6qdl-tqma6b.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x20000000>;
};
};

3
arch/arm/dts/imx6q-mba6b-u-boot.dtsi Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: GPL-2.0
#include "imx6qdl-mba6-u-boot.dtsi"

20
arch/arm/dts/imx6q-mba6b.dts
View file

@ -1,20 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2013 Sascha Hauer, Pengutronix
*
* Copyright 2013-2021 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/dts-v1/;
#include "imx6q-tqma6b.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6b.dtsi"
#include "imx6q-mba6.dtsi"
/ {
model = "TQ TQMa6Q on MBa6x";
compatible = "tq,imx6q-mba6x-b", "tq,mba6b",
"tq,imx6q-tqma6q-b", "fsl,imx6q";
};

16
arch/arm/dts/imx6q-tqma6a.dtsi
View file

@ -1,16 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Sascha Hauer, Pengutronix
* Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6q.dtsi"
#include "imx6qdl-tqma6a.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x40000000>;
};
};

15
arch/arm/dts/imx6q-tqma6b.dtsi
View file

@ -1,15 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Sascha Hauer, Pengutronix
*/
#include "imx6q.dtsi"
#include "imx6qdl-tqma6b.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x40000000>;
};
};

15
arch/arm/dts/imx6qdl-mba6-u-boot.dtsi Normal file
View file

@ -0,0 +1,15 @@
// SPDX-License-Identifier: GPL-2.0
#include "imx6qdl-u-boot.dtsi"
/ {
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog1>;
bootph-pre-ram;
};
};
&wdog1 {
bootph-pre-ram;
};

215
arch/arm/dts/imx6qdl-tqma6.dtsi
View file

@ -1,215 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Sascha Hauer, Pengutronix
* Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "supply-3p3v";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
status = "okay";
m25p80: flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
m25p,fast-read;
};
};
&iomuxc {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
/* HYS, SPEED = MED, 100k up, DSE = 011, SRE_FAST */
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b099
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb099
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb099
/* eCSPI1 SS1 */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0xb099
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
>;
};
pinctrl_i2c1_recovery: i2c1recoverygrp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b899
MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b899
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b899
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
>;
};
pinctrl_i2c3_recovery: i2c3recoverygrp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b899
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b899
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b099 /* PMIC irq */
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};
&pmic {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio6>;
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
regulators {
reg_vddcore: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-always-on;
};
reg_vddsoc: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-always-on;
};
reg_gen_3v3: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_ddr_1v5a: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-always-on;
};
reg_ddr_1v5b: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_5v_600mA: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
regulator-always-on;
};
reg_snvs_3v: vsnvs {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
reg_vrefddr: vrefddr {
regulator-boot-on;
regulator-always-on;
};
reg_vgen1_1v5: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
/* not used */
};
reg_vgen2_1v2_eth: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
reg_vgen3_2v8: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen4_1v8: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen5_1v8_eth: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen6_3v3: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
/* eMMC */
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
vmmc-supply = <&reg_3p3v>;
non-removable;
disable-wp;
no-sd;
no-sdio;
bus-width = <8>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
mmccard: mmccard@0 {
reg = <0>;
compatible = "mmc-card";
broken-hpi;
};
};

53
arch/arm/dts/imx6qdl-tqma6a.dtsi
View file

@ -1,53 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Sascha Hauer, Pengutronix
* Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include <dt-bindings/gpio/gpio.h>
&fec {
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
};
&i2c1 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_recovery>;
scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
clock-frequency = <100000>;
status = "okay";
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
};
sensor@48 {
compatible = "national,lm75";
reg = <0x48>;
};
eeprom@50 {
compatible = "st,24c64", "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
};
&iomuxc {
/*
* This pinmuxing is required for the ERR006687 workaround. Board
* DTS files that enable the FEC controller with
* fsl,err006687-workaround-present must include this group.
*/
pinctrl_enet_fix: enetfixgrp {
fsl,pins = <
/* ENET ping patch */
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>;
};
};

33
arch/arm/dts/imx6qdl-tqma6b.dtsi
View file

@ -1,33 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Sascha Hauer, Pengutronix
* Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include <dt-bindings/gpio/gpio.h>
&i2c3 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_recovery>;
scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
clock-frequency = <100000>;
status = "okay";
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
};
sensor@48 {
compatible = "national,lm75";
reg = <0x48>;
};
eeprom@50 {
compatible = "st,24c64", "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
};

2
arch/arm/dts/imx8ulp-evk-u-boot.dtsi
View file

@ -3,6 +3,8 @@
* Copyright 2021 NXP
*/
#include "imx8ulp-u-boot.dtsi"
/ {
mu@27020000 {
compatible = "fsl,imx8ulp-mu";

63
arch/arm/dts/imx8ulp-u-boot.dtsi Normal file
View file

@ -0,0 +1,63 @@
// SPDX-License-Identifier: GPL-2.0+
#ifdef CONFIG_BINMAN
/ {
binman: binman {
multiple-images;
};
};
&binman {
u-boot-spl-ddr {
align = <4>;
align-size = <4>;
filename = "u-boot-spl-ddr.bin";
pad-byte = <0xff>;
u-boot-spl {
align-end = <4>;
filename = "u-boot-spl.bin";
};
};
spl {
filename = "spl.bin";
mkimage {
args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x22020000";
blob {
filename = "u-boot-spl-ddr.bin";
};
};
};
u-boot-container {
filename = "u-boot-container.bin";
mkimage {
args = "-n u-boot-container.cfgout -T imx8image -e 0x0";
blob {
filename = "u-boot.bin";
};
};
};
imx-boot {
filename = "flash.bin";
pad-byte = <0x00>;
spl: blob-ext@1 {
filename = "spl.bin";
offset = <0x0>;
align-size = <0x400>;
align = <0x400>;
};
uboot: blob-ext@2 {
filename = "u-boot-container.bin";
};
};
};
#endif

33
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
View file

@ -78,6 +78,23 @@
};
};
tifsstub-gp {
filename = "tifsstub.bin_gp";
ti-secure-rom {
content = <&tifsstub_gp>;
core = "secure";
load = <0x60000>;
sw-rev = <CONFIG_K3_X509_SWRV>;
keyfile = "ti-degenerate-key.pem";
tifsstub;
};
tifsstub_gp: tifsstub-gp.bin {
filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
type = "blob-ext";
optional;
};
};
ti-spl_unsigned {
filename = "tispl.bin_unsigned";
symlink = "tispl.bin";
@ -115,6 +132,19 @@
};
};
tifsstub-gp {
description = "tifsstub";
type = "firmware";
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
};
dm {
description = "DM binary";
type = "firmware";
@ -158,7 +188,8 @@
conf-0 {
description = "k3-am625-beagleplay";
firmware = "atf";
loadables = "tee", "dm", "spl";
loadables = "tee", "dm", "spl",
"tifsstub-gp";
fdt = "fdt-0";
};
};

101
arch/arm/dts/k3-am625-phycore-som-binman.dtsi
View file

@ -150,12 +150,107 @@
filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
};
};
tifsstub-hs {
filename = "tifsstub.bin_hs";
ti-secure-rom {
content = <&tifsstub_hs_cert>;
core = "secure";
load = <0x40000>;
sw-rev = <CONFIG_K3_X509_SWRV>;
keyfile = "custMpk.pem";
countersign;
tifsstub;
};
tifsstub_hs_cert: tifsstub-hs-cert.bin {
filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
type = "blob-ext";
optional;
};
tifsstub_hs_enc: tifsstub-hs-enc.bin {
filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
type = "blob-ext";
optional;
};
};
tifsstub-fs {
filename = "tifsstub.bin_fs";
tifsstub_fs_cert: tifsstub-fs-cert.bin {
filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
type = "blob-ext";
optional;
};
tifsstub_fs_enc: tifsstub-fs-enc.bin {
filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
type = "blob-ext";
optional;
};
};
tifsstub-gp {
filename = "tifsstub.bin_gp";
ti-secure-rom {
content = <&tifsstub_gp>;
core = "secure";
load = <0x60000>;
sw-rev = <CONFIG_K3_X509_SWRV>;
keyfile = "ti-degenerate-key.pem";
tifsstub;
};
tifsstub_gp: tifsstub-gp.bin {
filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
type = "blob-ext";
optional;
};
};
ti-spl {
insert-template = <&ti_spl_template>;
fit {
images {
tifsstub-hs {
description = "TIFSSTUB";
type = "firmware";
arch = "arm32";
compression = "none";
os = "tifsstub-hs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
blob-ext {
filename = "tifsstub.bin_hs";
};
};
tifsstub-fs {
description = "TIFSSTUB";
type = "firmware";
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
};
tifsstub-gp {
description = "TIFSSTUB";
type = "firmware";
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
};
dm {
ti-secure {
content = <&dm>;
@ -187,7 +282,8 @@
conf-0 {
description = "k3-am625-phyboard-lyra-rdk";
firmware = "atf";
loadables = "tee", "dm", "spl";
loadables = "tee", "tifsstub-hs", "tifsstub-fs",
"tifsstub-gp", "dm", "spl";
fdt = "fdt-0";
};
};
@ -266,7 +362,8 @@
conf-0 {
description = "k3-am625-phyboard-lyra-rdk";
firmware = "atf";
loadables = "tee", "dm", "spl";
loadables = "tee", "tifsstub-hs", "tifsstub-fs",
"tifsstub-gp", "dm", "spl";
fdt = "fdt-0";
};
};

4
arch/arm/dts/px30-firefly.dts
View file

@ -13,6 +13,10 @@
model = "Firefly Core-PX30-JD4";
compatible = "rockchip,px30-firefly", "rockchip,px30";
aliases {
ethernet0 = &gmac;
};
chosen {
stdout-path = "serial2:115200n8";
};

4
arch/arm/dts/px30-u-boot.dtsi
View file

@ -99,16 +99,20 @@
&gpio0 {
bootph-all;
gpio-ranges = <&pinctrl 0 0 32>;
};
&gpio1 {
bootph-all;
gpio-ranges = <&pinctrl 0 32 32>;
};
&gpio2 {
bootph-all;
gpio-ranges = <&pinctrl 0 64 32>;
};
&gpio3 {
bootph-all;
gpio-ranges = <&pinctrl 0 96 32>;
};

2415
arch/arm/dts/px30.dtsi
View file

File diff suppressed because it is too large Load diff

19
arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
View file

@ -4,17 +4,6 @@
*/
#include "rk3308-u-boot.dtsi"
&emmc {
cap-sd-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus4>;
};
&emmc_bus4 {
bootph-pre-ram;
bootph-some-ram;
};
&u2phy_otg {
/delete-property/ phy-supply;
};
@ -24,14 +13,6 @@
clock-frequency = <24000000>;
};
&uart0_cts {
bootph-all;
};
&uart0_rts {
bootph-all;
};
&uart0_xfer {
bootph-all;
};

21
arch/arm/dts/rk3308-rock-s0-u-boot.dtsi Normal file
View file

@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk3308-u-boot.dtsi"
&emmc_pwren {
bootph-pre-ram;
bootph-some-ram;
};
&uart0 {
bootph-all;
clock-frequency = <24000000>;
};
&uart0_xfer {
bootph-all;
};
&vdd_core {
regulator-init-microvolt = <1015000>;
};

16
arch/arm/dts/rk3308-u-boot.dtsi
View file

@ -21,22 +21,6 @@
bootph-all;
};
otp: nvmem@ff210000 {
compatible = "rockchip,rk3308-otp";
reg = <0x0 0xff210000 0x0 0x4000>;
clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
<&cru PCLK_OTP_PHY>;
clock-names = "otp", "apb_pclk", "phy";
resets = <&cru SRST_OTP_PHY>;
reset-names = "phy";
#address-cells = <1>;
#size-cells = <1>;
cpu_id: id@7 {
reg = <0x07 0x10>;
};
};
rng: rng@ff2f0000 {
compatible = "rockchip,cryptov2-rng";
reg = <0x0 0xff2f0000 0x0 0x4000>;

4
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi
View file

@ -48,18 +48,22 @@
&gpio0 {
bootph-all;
gpio-ranges = <&pinctrl 0 0 32>;
};
&gpio1 {
bootph-all;
gpio-ranges = <&pinctrl 0 32 32>;
};
&gpio2 {
bootph-all;
gpio-ranges = <&pinctrl 0 64 32>;
};
&gpio3 {
bootph-all;
gpio-ranges = <&pinctrl 0 96 32>;
};
&grf {

15
arch/arm/dts/rk3326.dtsi
View file

@ -1,15 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
*/
#include "px30.dtsi"
&display_subsystem {
ports = <&vopb_out>;
};
/delete-node/ &dsi_in_vopl;
/delete-node/ &lvds_vopl_in;
/delete-node/ &vopl;
/delete-node/ &vopl_mmu;

14
arch/arm/dts/rk3566-orangepi-3b-u-boot.dtsi Normal file
View file

@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk356x-u-boot.dtsi"
&gpio4 {
bootph-pre-ram;
};
&sfc {
flash@0 {
bootph-pre-ram;
bootph-some-ram;
};
};

3
arch/arm/dts/rk3566-orangepi-3b-v1.1-u-boot.dtsi Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk3566-orangepi-3b-u-boot.dtsi"

3
arch/arm/dts/rk3566-orangepi-3b-v1.1.dts Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include <arm64/rockchip/rk3566-orangepi-3b-v1.1.dts>

3
arch/arm/dts/rk3566-orangepi-3b-v2.1-u-boot.dtsi Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk3566-orangepi-3b-u-boot.dtsi"

3
arch/arm/dts/rk3566-orangepi-3b-v2.1.dts Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include <arm64/rockchip/rk3566-orangepi-3b-v2.1.dts>

5
arch/arm/dts/rk3566-orangepi-3b.dts Normal file
View file

@ -0,0 +1,5 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <arm64/rockchip/rk3566-orangepi-3b.dtsi>

28
arch/arm/dts/rk3566-pinetab2-v0.1.dts
View file

@ -1,28 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3566-pinetab2.dtsi"
/ {
model = "Pine64 PineTab2 v0.1";
compatible = "pine64,pinetab2-v0.1", "pine64,pinetab2", "rockchip,rk3566";
};
&lcd {
reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>;
};
&pinctrl {
lcd0 {
lcd0_rst_l: lcd0-rst-l {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc1 {
vmmc-supply = <&vcc3v3_sys>;
};

48
arch/arm/dts/rk3566-pinetab2-v2.0.dts
View file

@ -1,48 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3566-pinetab2.dtsi"
/ {
model = "Pine64 PineTab2 v2.0";
compatible = "pine64,pinetab2-v2.0", "pine64,pinetab2", "rockchip,rk3566";
};
&gpio_keys {
pinctrl-0 = <&kb_id_det>, <&hall_int_l>;
event-hall-sensor {
debounce-interval = <20>;
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
label = "Hall Sensor";
linux,code = <SW_LID>;
linux,input-type = <EV_SW>;
wakeup-event-action = <EV_ACT_DEASSERTED>;
wakeup-source;
};
};
&lcd {
reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>;
};
&pinctrl {
lcd0 {
lcd0_rst_l: lcd0-rst-l {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hall {
hall_int_l: hall-int-l {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc1 {
vmmc-supply = <&vcc_sys>;
};

943
arch/arm/dts/rk3566-pinetab2.dtsi
View file

@ -1,943 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include <dt-bindings/usb/pd.h>
#include "rk3566.dtsi"
/ {
chassis-type = "tablet";
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc0;
};
chosen {
stdout-path = "serial2:1500000n8";
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <25>;
button-vol-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <297500>;
};
button-vol-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
press-threshold-microvolt = <1750>;
};
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <20 220>;
num-interpolated-steps = <200>;
default-brightness-level = <100>;
power-supply = <&vcc_sys>;
};
battery: battery {
compatible = "simple-battery";
charge-full-design-microamp-hours = <6000000>;
charge-term-current-microamp = <300000>;
constant-charge-current-max-microamp = <2000000>;
constant-charge-voltage-max-microvolt = <4300000>;
voltage-max-design-microvolt = <4350000>;
voltage-min-design-microvolt = <3400000>;
ocv-capacity-celsius = <20>;
ocv-capacity-table-0 = <4322000 100>, <4250000 95>, <4192000 90>, <4136000 85>,
<4080000 80>, <4022000 75>, <3972000 70>, <3928000 65>,
<3885000 60>, <3833000 55>, <3798000 50>, <3780000 45>,
<3776000 40>, <3773000 35>, <3755000 30>, <3706000 25>,
<3640000 20>, <3589000 15>, <3535000 10>, <3492000 5>,
<3400000 0>;
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&kb_id_det>;
tablet-mode-switch {
debounce-interval = <20>;
gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
label = "Tablet Mode";
linux,input-type = <EV_SW>;
linux,code = <SW_TABLET_MODE>;
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "d";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
led-0 {
compatible = "regulator-led";
vled-supply = <&vcc5v0_flashled>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_FLASH;
};
rk817-sound {
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <&hp_det_l>;
simple-audio-card,format = "i2s";
simple-audio-card,name = "rk817_ext";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Headphone", "Headphones",
"Speaker", "Internal Speakers";
simple-audio-card,routing =
"MICR", "Mic Jack",
"Headphones", "HPOL",
"Headphones", "HPOR",
"Internal Speakers", "Speaker Amplifier OUTL",
"Internal Speakers", "Speaker Amplifier OUTR",
"Speaker Amplifier INL", "HPOL",
"Speaker Amplifier INR", "HPOR";
simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
simple-audio-card,aux-devs = <&speaker_amp>;
simple-audio-card,pin-switches = "Internal Speakers";
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk817>;
};
};
speaker_amp: speaker-amplifier {
compatible = "simple-audio-amplifier";
pinctrl-names = "default";
pinctrl-0 = <&spk_ctl>;
enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
sound-name-prefix = "Speaker Amplifier";
VCC-supply = <&vcc_bat>;
};
vcc_3v3: vcc-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_minipcie: vcc3v3-minipcie-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_pwren_h>;
regulator-name = "vcc3v3_minipcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_sys>;
};
vcc3v3_sd: vcc3v3-sd-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwren_l>;
regulator-name = "vcc3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
vcc5v0_flashled: vcc5v0-flashled-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&flash_led_en_h>;
regulator-name = "vcc5v0_flashled";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v_midu>;
};
vcc5v0_usb_host0: vcc5v0-usb-host0-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_host_pwren1_h>;
regulator-name = "vcc5v0_usb_host0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v_midu>;
};
vcc5v0_usb_host2: vcc5v0-usb-host2-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_host_pwren2_h>;
regulator-name = "vcc5v0_usb_host2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v_midu>;
};
vcc_bat: vcc-bat-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_bat";
regulator-always-on;
regulator-boot-on;
};
vcc_sys: vcc-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_bat>;
};
vdd1v2_dvp: vdd1v2-dvp-regulator {
compatible = "regulator-fixed";
regulator-name = "vdd1v2_dvp";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vcc_3v3>;
};
};
&combphy1 {
status = "okay";
};
&combphy2 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&cpu1 {
cpu-supply = <&vdd_cpu>;
};
&cpu2 {
cpu-supply = <&vdd_cpu>;
};
&cpu3 {
cpu-supply = <&vdd_cpu>;
};
&cru {
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <32768>, <1200000000>, <200000000>, <500000000>;
assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>;
};
&csi_dphy {
status = "okay";
};
&dsi0 {
status = "okay";
clock-master;
#address-cells = <1>;
#size-cells = <0>;
lcd: panel@0 {
compatible = "boe,th101mb31ig002-28a";
reg = <0>;
backlight = <&backlight>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
rotation = <90>;
power-supply = <&vcc_3v3>;
port@0 {
panel_in_dsi: endpoint@0 {
remote-endpoint = <&dsi0_out_con>;
};
};
};
};
&dsi0_in {
dsi0_in_vp1: endpoint {
remote-endpoint = <&vp1_out_dsi0>;
};
};
&dsi0_out {
dsi0_out_con: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
&dsi_dphy0 {
status = "okay";
};
&gpu {
mali-supply = <&vdd_gpu_npu>;
status = "okay";
};
&hdmi {
avdd-0v9-supply = <&vdda_0v9_p>;
avdd-1v8-supply = <&vcc_1v8>;
status = "okay";
};
&hdmi_in {
hdmi_in_vp0: endpoint {
remote-endpoint = <&vp0_out_hdmi>;
};
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&hdmi_sound {
status = "okay";
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
vdd_cpu: regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1150000>;
regulator-ramp-delay = <2300>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk817: pmic@20 {
compatible = "rockchip,rk817";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
clock-names = "mclk";
clocks = <&cru I2S1_MCLKOUT_TX>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
#clock-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
rockchip,system-power-controller;
#sound-dai-cells = <0>;
wakeup-source;
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
vcc3-supply = <&vcc_sys>;
vcc4-supply = <&vcc_sys>;
vcc5-supply = <&vcc_sys>;
vcc6-supply = <&vcc_sys>;
vcc7-supply = <&vcc_sys>;
vcc8-supply = <&vcc_sys>;
vcc9-supply = <&vcc5v_midu>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu_npu: DCDC_REG2 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_gpu_npu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc3v3_sys: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <0x2>;
regulator-name = "vcc3v3_sys";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_pmu";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdda_0v9_p: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda_0v9_p";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_pmu";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vccio_acodec: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_acodec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_pmu";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_1v8: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc1v8_dvp: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc1v8_dvp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc2v8_dvp: LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc2v8_dvp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc5v_midu: BOOST {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "boost";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vbus: OTG_SWITCH {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "otg_switch";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
charger {
monitored-battery = <&battery>;
rockchip,resistor-sense-micro-ohms = <10000>;
rockchip,sleep-enter-current-microamp = <300000>;
rockchip,sleep-filter-current-microamp = <100000>;
};
};
};
&i2c1 {
clock-frequency = <400000>;
status = "okay";
touchscreen@5d {
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&tp_int_l_pmuio2>, <&tp_rst_l_pmuio2>;
AVDD28-supply = <&vcc3v3_pmu>;
VDDIO-supply = <&vcca1v8_pmu>;
irq-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
};
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-0 = <&i2c2m1_xfer>;
status = "okay";
vcm@c {
compatible = "dongwoon,dw9714";
reg = <0x0c>;
vcc-supply = <&vcc1v8_dvp>;
};
camera@36 {
compatible = "ovti,ov5648";
reg = <0x36>;
pinctrl-names = "default";
pinctrl-0 = <&camerab_pdn_l &camerab_rst_l>;
clocks = <&cru CLK_CIF_OUT>;
assigned-clocks = <&cru CLK_CIF_OUT>;
assigned-clock-rates = <24000000>;
avdd-supply = <&vcc2v8_dvp>;
dvdd-supply = <&vdd1v2_dvp>;
dovdd-supply = <&vcc1v8_dvp>;
powerdown-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
port {
endpoint {
data-lanes = <1 2>;
remote-endpoint = <0>;
link-frequencies = /bits/ 64 <210000000 168000000>;
};
};
};
};
&i2c5 {
clock-frequency = <400000>;
status = "okay";
accelerometer@18 {
compatible = "silan,sc7a20";
reg = <0x18>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&gsensor_int_l>;
st,drdy-int-pin = <1>;
vdd-supply = <&vcc_1v8>;
vddio-supply = <&vcc_1v8>;
mount-matrix = "1", "0", "0",
"0", "0", "1",
"0", "1", "0";
};
};
&i2s0_8ch {
status = "okay";
};
&i2s1_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
&i2s1m0_sdi0
&i2s1m0_sdo0>;
rockchip,trcm-sync-tx-only;
status = "okay";
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_h>;
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_minipcie>;
status = "okay";
};
&pinctrl {
camerab {
camerab_pdn_l: camerab-pdn-l {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
camerab_rst_l: camerab-rst-l {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
cameraf {
cameraf_pdn_l: cameraf-pdn-l {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
cameraf_rst_l: cameraf-rst-l {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
flash {
flash_led_en_h: flash-led-en-h {
rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
fspi {
fspi_dual_io_pins: fspi-dual-io-pins {
rockchip,pins =
/* fspi_clk */
<1 RK_PD0 1 &pcfg_pull_none>,
/* fspi_cs0n */
<1 RK_PD3 1 &pcfg_pull_none>,
/* fspi_d0 */
<1 RK_PD1 1 &pcfg_pull_none>,
/* fspi_d1 */
<1 RK_PD2 1 &pcfg_pull_none>;
};
};
gsensor {
gsensor_int_l: gsensor-int-l {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
kb {
kb_id_det: kb-id-det {
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_pwren_h: lcd-pwren-h {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie_pwren_h: pcie-pwren-h {
rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_reset_h: pcie-reset-h {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_pwren_l: sdmmc-pwren-l {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sound {
hp_det_l: hp-det-l {
rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
spk_ctl: spk-ctl {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
tp {
tp_int_l_pmuio2: tp-int-l-pmuio2 {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
tp_rst_l_pmuio2: tp-rst-l-pmuio2 {
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usbcc_int_l: usbcc-int-l {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb_host_pwren1_h: usb-host-pwren1-h {
rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb_host_pwren2_h: usb-host-pwren2-h {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
host_wake_wl: host-wake-wl {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_wake_host_h: wifi-wake-host-h {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&pmu_io_domains {
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcca1v8_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_1v8>;
vccio6-supply = <&vcc1v8_dvp>;
vccio7-supply = <&vcc_3v3>;
status = "okay";
};
&pwm4 {
status = "okay";
};
&saradc {
vref-supply = <&vcc_1v8>;
status = "okay";
};
&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
max-frequency = <200000000>;
mmc-hs200-1_8v;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8
&emmc_clk
&emmc_cmd
&emmc_datastrobe
&emmc_rstnout>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4
&sdmmc0_clk
&sdmmc0_cmd
&sdmmc0_det>;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&sdmmc1 {
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4
&sdmmc1_cmd
&sdmmc1_clk>;
sd-uhs-sdr104;
vqmmc-supply = <&vcca1v8_pmu>;
status = "okay";
};
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspi_dual_io_pins>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
spi-rx-bus-width = <2>;
spi-tx-bus-width = <1>;
};
};
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
status = "okay";
};
&uart2 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
status = "okay";
};
&usb_host1_xhci {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_host {
phy-supply = <&vcc5v0_usb_host0>;
status = "okay";
};
&usb2phy0_otg {
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc5v0_usb_host2>;
status = "okay";
};
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
status = "okay";
};
&vop_mmu {
status = "okay";
};
&vp0 {
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
remote-endpoint = <&hdmi_in_vp0>;
};
};
&vp1 {
vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
reg = <ROCKCHIP_VOP2_EP_MIPI0>;
remote-endpoint = <&dsi0_in_vp1>;
};
};

15
arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi Normal file
View file

@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
&saradc {
bootph-pre-ram;
};
&usb_host0_xhci {
dr_mode = "otg";
};
&vcca_1v8 {
bootph-pre-ram;
};

15
arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi Normal file
View file

@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
&saradc {
bootph-pre-ram;
};
&usb_host0_xhci {
dr_mode = "otg";
};
&vcca_1v8 {
bootph-pre-ram;
};

18
arch/arm/dts/rk3566-rock-3c-u-boot.dtsi Normal file
View file

@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
&sfc {
flash@0 {
bootph-pre-ram;
bootph-some-ram;
};
};
/ {
leds {
led-0 {
default-state = "on";
};
};
};

0
arch/arm/dts/rk3568-evb-u-boot.dtsi → arch/arm/dts/rk3568-evb1-v10-u-boot.dtsi
View file

13
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
View file

@ -26,17 +26,12 @@
};
&sfc {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
bootph-pre-ram;
bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
&usb_host0_ohci {
status = "disabled";
};

15
arch/arm/dts/rk3568-rock-3b-u-boot.dtsi Normal file
View file

@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
&sdhci {
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
};
&sfc {
flash@0 {
bootph-pre-ram;
bootph-some-ram;
};
};

8
arch/arm/dts/rk3588-friendlyelec-cm3588-nas-u-boot.dtsi Normal file
View file

@ -0,0 +1,8 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk3588-u-boot.dtsi"
&sdhci {
cap-mmc-highspeed;
mmc-hs200-1_8v;
};

22
arch/arm/dts/rk3588-rock-5-itx-u-boot.dtsi Normal file
View file

@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Collabora Ltd.
*/
#include "rk3588-u-boot.dtsi"
&fspim2_pins {
bootph-pre-ram;
bootph-some-ram;
};
&sfc {
flash@0 {
bootph-pre-ram;
bootph-some-ram;
};
};
&vcc3v3_mkey {
regulator-always-on;
};

17
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
View file

@ -39,18 +39,6 @@
status = "okay";
};
&u2phy1 {
status = "okay";
};
&u2phy1_otg {
status = "okay";
};
&usbdp_phy1 {
status = "okay";
};
&usbdp_phy0 {
status = "okay";
};
@ -60,8 +48,3 @@
maximum-speed = "high-speed";
status = "okay";
};
&usb_host1_xhci {
dr_mode = "host";
status = "okay";
};

344
arch/arm/dts/rockchip-pinconf.dtsi
View file

@ -1,344 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*/
&pinctrl {
/omit-if-no-ref/
pcfg_pull_up: pcfg-pull-up {
bias-pull-up;
};
/omit-if-no-ref/
pcfg_pull_down: pcfg-pull-down {
bias-pull-down;
};
/omit-if-no-ref/
pcfg_pull_none: pcfg-pull-none {
bias-disable;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_0: pcfg-pull-none-drv-level-0 {
bias-disable;
drive-strength = <0>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_1: pcfg-pull-none-drv-level-1 {
bias-disable;
drive-strength = <1>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_2: pcfg-pull-none-drv-level-2 {
bias-disable;
drive-strength = <2>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_3: pcfg-pull-none-drv-level-3 {
bias-disable;
drive-strength = <3>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_4: pcfg-pull-none-drv-level-4 {
bias-disable;
drive-strength = <4>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_5: pcfg-pull-none-drv-level-5 {
bias-disable;
drive-strength = <5>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_6: pcfg-pull-none-drv-level-6 {
bias-disable;
drive-strength = <6>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_7: pcfg-pull-none-drv-level-7 {
bias-disable;
drive-strength = <7>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_8: pcfg-pull-none-drv-level-8 {
bias-disable;
drive-strength = <8>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_9: pcfg-pull-none-drv-level-9 {
bias-disable;
drive-strength = <9>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_10: pcfg-pull-none-drv-level-10 {
bias-disable;
drive-strength = <10>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_11: pcfg-pull-none-drv-level-11 {
bias-disable;
drive-strength = <11>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_12: pcfg-pull-none-drv-level-12 {
bias-disable;
drive-strength = <12>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_13: pcfg-pull-none-drv-level-13 {
bias-disable;
drive-strength = <13>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_14: pcfg-pull-none-drv-level-14 {
bias-disable;
drive-strength = <14>;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_15: pcfg-pull-none-drv-level-15 {
bias-disable;
drive-strength = <15>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_0: pcfg-pull-up-drv-level-0 {
bias-pull-up;
drive-strength = <0>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_1: pcfg-pull-up-drv-level-1 {
bias-pull-up;
drive-strength = <1>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_2: pcfg-pull-up-drv-level-2 {
bias-pull-up;
drive-strength = <2>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_3: pcfg-pull-up-drv-level-3 {
bias-pull-up;
drive-strength = <3>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_4: pcfg-pull-up-drv-level-4 {
bias-pull-up;
drive-strength = <4>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_5: pcfg-pull-up-drv-level-5 {
bias-pull-up;
drive-strength = <5>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_6: pcfg-pull-up-drv-level-6 {
bias-pull-up;
drive-strength = <6>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_7: pcfg-pull-up-drv-level-7 {
bias-pull-up;
drive-strength = <7>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_8: pcfg-pull-up-drv-level-8 {
bias-pull-up;
drive-strength = <8>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_9: pcfg-pull-up-drv-level-9 {
bias-pull-up;
drive-strength = <9>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_10: pcfg-pull-up-drv-level-10 {
bias-pull-up;
drive-strength = <10>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_11: pcfg-pull-up-drv-level-11 {
bias-pull-up;
drive-strength = <11>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_12: pcfg-pull-up-drv-level-12 {
bias-pull-up;
drive-strength = <12>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_13: pcfg-pull-up-drv-level-13 {
bias-pull-up;
drive-strength = <13>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_14: pcfg-pull-up-drv-level-14 {
bias-pull-up;
drive-strength = <14>;
};
/omit-if-no-ref/
pcfg_pull_up_drv_level_15: pcfg-pull-up-drv-level-15 {
bias-pull-up;
drive-strength = <15>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_0: pcfg-pull-down-drv-level-0 {
bias-pull-down;
drive-strength = <0>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_1: pcfg-pull-down-drv-level-1 {
bias-pull-down;
drive-strength = <1>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_2: pcfg-pull-down-drv-level-2 {
bias-pull-down;
drive-strength = <2>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_3: pcfg-pull-down-drv-level-3 {
bias-pull-down;
drive-strength = <3>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_4: pcfg-pull-down-drv-level-4 {
bias-pull-down;
drive-strength = <4>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_5: pcfg-pull-down-drv-level-5 {
bias-pull-down;
drive-strength = <5>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_6: pcfg-pull-down-drv-level-6 {
bias-pull-down;
drive-strength = <6>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_7: pcfg-pull-down-drv-level-7 {
bias-pull-down;
drive-strength = <7>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_8: pcfg-pull-down-drv-level-8 {
bias-pull-down;
drive-strength = <8>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_9: pcfg-pull-down-drv-level-9 {
bias-pull-down;
drive-strength = <9>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_10: pcfg-pull-down-drv-level-10 {
bias-pull-down;
drive-strength = <10>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_11: pcfg-pull-down-drv-level-11 {
bias-pull-down;
drive-strength = <11>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_12: pcfg-pull-down-drv-level-12 {
bias-pull-down;
drive-strength = <12>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_13: pcfg-pull-down-drv-level-13 {
bias-pull-down;
drive-strength = <13>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_14: pcfg-pull-down-drv-level-14 {
bias-pull-down;
drive-strength = <14>;
};
/omit-if-no-ref/
pcfg_pull_down_drv_level_15: pcfg-pull-down-drv-level-15 {
bias-pull-down;
drive-strength = <15>;
};
/omit-if-no-ref/
pcfg_pull_up_smt: pcfg-pull-up-smt {
bias-pull-up;
input-schmitt-enable;
};
/omit-if-no-ref/
pcfg_pull_down_smt: pcfg-pull-down-smt {
bias-pull-down;
input-schmitt-enable;
};
/omit-if-no-ref/
pcfg_pull_none_smt: pcfg-pull-none-smt {
bias-disable;
input-schmitt-enable;
};
/omit-if-no-ref/
pcfg_pull_none_drv_level_0_smt: pcfg-pull-none-drv-level-0-smt {
bias-disable;
drive-strength = <0>;
input-schmitt-enable;
};
/omit-if-no-ref/
pcfg_output_high: pcfg-output-high {
output-high;
};
/omit-if-no-ref/
pcfg_output_low: pcfg-output-low {
output-low;
};
};

2
arch/arm/dts/sun50i-a64-bananapi-m64.dts
View file

@ -53,7 +53,7 @@
};
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
clocks = <&rtc CLK_OSC32K_FANOUT>;

2
arch/arm/dts/sun50i-a64-nanopi-a64.dts
View file

@ -41,7 +41,7 @@
};
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";

2
arch/arm/dts/sun50i-a64-olinuxino.dts
View file

@ -52,7 +52,7 @@
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};

2
arch/arm/dts/sun50i-a64-orangepi-win.dts
View file

@ -68,7 +68,7 @@
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
clocks = <&rtc CLK_OSC32K_FANOUT>;

2
arch/arm/dts/sun50i-a64-pinebook.dts
View file

@ -79,7 +79,7 @@
enable-active-high;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};

16
arch/arm/dts/sun50i-a64-pinephone.dtsi
View file

@ -39,25 +39,35 @@
leds {
compatible = "gpio-leds";
led-0 {
led0: led-0 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
retain-state-suspended;
};
led-1 {
led1: led-1 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
retain-state-suspended;
};
led-2 {
led2: led-2 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
retain-state-suspended;
};
};
multi-led {
compatible = "leds-group-multicolor";
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_INDICATOR;
leds = <&led0>, <&led1>, <&led2>;
};
reg_ps: ps-regulator {
compatible = "regulator-fixed";
regulator-name = "ps";

2
arch/arm/dts/sun50i-a64-pinetab.dts
View file

@ -98,7 +98,7 @@
enable-active-high;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
post-power-on-delay-ms = <200>;

2
arch/arm/dts/sun50i-a64-teres-i.dts
View file

@ -74,7 +74,7 @@
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};

18
arch/arm/dts/sun50i-a64.dtsi
View file

@ -107,27 +107,19 @@
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-120000000 {
opp-hz = /bits/ 64 <120000000>;
};
opp-312000000 {
opp-hz = /bits/ 64 <312000000>;
};
opp-432000000 {
opp-hz = /bits/ 64 <432000000>;
};
};
osc24M: osc24M_clk {
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
osc32k: osc32k_clk {
osc32k: osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
@ -216,21 +208,21 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: cpu_alert1 {
cpu_alert1: cpu-alert1 {
/* milliCelsius */
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <110000>;
hysteresis = <2000>;

183
arch/arm/dts/sun50i-h313-tanix-tx1.dts Normal file
View file

@ -0,0 +1,183 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2024 Arm Ltd.
*/
/dts-v1/;
#include "sun50i-h616.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Tanix TX1";
compatible = "oranth,tanix-tx1", "allwinner,sun50i-h616";
aliases {
serial0 = &uart0;
ethernet0 = &sdio_wifi;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
key {
label = "hidden";
linux,code = <BTN_0>;
gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 */
};
};
leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
default-state = "on";
};
};
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
pinctrl-0 = <&x32clk_fanout_pin>;
pinctrl-names = "default";
reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
};
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC input */
compatible = "regulator-fixed";
regulator-name = "vcc-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&ehci0 {
status = "okay";
};
&ir {
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_dldo1>;
vqmmc-supply = <&reg_aldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
sdio_wifi: wifi@1 {
reg = <1>;
};
};
&mmc2 {
vmmc-supply = <&reg_dldo1>;
vqmmc-supply = <&reg_aldo1>;
bus-width = <8>;
non-removable;
max-frequency = <100000000>;
cap-mmc-hw-reset;
mmc-ddr-1_8v;
status = "okay";
};
&ohci0 {
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_aldo1>;
vcc-pf-supply = <&reg_dldo1>;
vcc-pg-supply = <&reg_aldo1>;
vcc-ph-supply = <&reg_dldo1>;
vcc-pi-supply = <&reg_dldo1>;
};
&r_i2c {
status = "okay";
axp313: pmic@36 {
compatible = "x-powers,axp313a";
reg = <0x36>;
#interrupt-cells = <1>;
interrupt-controller;
vin1-supply = <&reg_vcc5v>;
vin2-supply = <&reg_vcc5v>;
vin3-supply = <&reg_vcc5v>;
regulators {
/* Supplies VCC-PLL, so needs to be always on. */
reg_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc1v8";
};
/* Supplies VCC-IO, so needs to be always on. */
reg_dldo1: dldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3";
};
reg_dcdc1: dcdc1 {
regulator-always-on;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <990000>;
regulator-name = "vdd-gpu-sys";
};
reg_dcdc2: dcdc2 {
regulator-always-on;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1120000>;
regulator-name = "vdd-cpu";
};
reg_dcdc3: dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vdd-dram";
};
};
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
&usbotg {
dr_mode = "host"; /* USB A type receptable */
status = "okay";
};
&usbphy {
status = "okay";
};

2
arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
View file

@ -68,7 +68,7 @@
states = <1100000 0>, <1300000 1>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;

4
arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
View file

@ -103,7 +103,7 @@
states = <1100000 0x0>, <1300000 0x1>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
@ -170,7 +170,7 @@
non-removable;
status = "okay";
rtl8189etv: sdio_wifi@1 {
rtl8189etv: wifi@1 {
reg = <1>;
};
};

2
arch/arm/dts/sun50i-h5-orangepi-prime.dts
View file

@ -85,7 +85,7 @@
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */
};

2
arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
View file

@ -97,7 +97,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
rtl8189ftv: sdio_wifi@1 {
rtl8189ftv: wifi@1 {
reg = <1>;
};
};

2
arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
View file

@ -52,7 +52,7 @@
regulator-max-microvolt = <3300000>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;

2
arch/arm/dts/sun50i-h6-beelink-gs1.dts
View file

@ -34,7 +34,7 @@
};
};
ext_osc32k: ext_osc32k_clk {
ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;

2
arch/arm/dts/sun50i-h6-orangepi-3.dts
View file

@ -33,7 +33,7 @@
};
};
ext_osc32k: ext_osc32k_clk {
ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;

2
arch/arm/dts/sun50i-h6-orangepi-lite2.dts
View file

@ -11,7 +11,7 @@
serial1 = &uart1; /* BT-UART */
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";

2
arch/arm/dts/sun50i-h6-orangepi.dtsi
View file

@ -32,7 +32,7 @@
};
};
ext_osc32k: ext_osc32k_clk {
ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;

6
arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
View file

@ -5,13 +5,13 @@
#include "sun50i-h6-pine-h64.dts"
/delete-node/ &reg_gmac_3v3;
/ {
model = "Pine H64 model B";
compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";
/delete-node/ reg_gmac_3v3;
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
post-power-on-delay-ms = <200>;

2
arch/arm/dts/sun50i-h6-pine-h64.dts
View file

@ -22,7 +22,7 @@
stdout-path = "serial0:115200n8";
};
ext_osc32k: ext_osc32k_clk {
ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;

2
arch/arm/dts/sun50i-h6.dtsi
View file

@ -68,7 +68,7 @@
status = "disabled";
};
osc24M: osc24M_clk {
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;

5
arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi
View file

@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -62,6 +63,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&mmc0 {
vmmc-supply = <&reg_dldo1>;
/* Card detection pin is not connected */

115
arch/arm/dts/sun50i-h616-cpu-opp.dtsi Normal file
View file

@ -0,0 +1,115 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2023 Martin Botka <martin@somainline.org>
/ {
cpu_opp_table: opp-table-cpu {
compatible = "allwinner,sun50i-h616-operating-points";
nvmem-cells = <&cpu_speed_grade>;
opp-shared;
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
opp-microvolt = <900000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x1f>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x12>;
};
opp-720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <900000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x0d>;
};
opp-792000000 {
opp-hz = /bits/ 64 <792000000>;
opp-microvolt-speed1 = <900000>;
opp-microvolt-speed4 = <940000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x12>;
};
opp-936000000 {
opp-hz = /bits/ 64 <936000000>;
opp-microvolt = <900000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x0d>;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt-speed0 = <950000>;
opp-microvolt-speed1 = <940000>;
opp-microvolt-speed2 = <950000>;
opp-microvolt-speed3 = <950000>;
opp-microvolt-speed4 = <1020000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x1f>;
};
opp-1104000000 {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt-speed0 = <1000000>;
opp-microvolt-speed2 = <1000000>;
opp-microvolt-speed3 = <1000000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x0d>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt-speed0 = <1050000>;
opp-microvolt-speed1 = <1020000>;
opp-microvolt-speed2 = <1050000>;
opp-microvolt-speed3 = <1050000>;
opp-microvolt-speed4 = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x1f>;
};
opp-1320000000 {
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x1d>;
};
opp-1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x0d>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt-speed1 = <1100000>;
opp-microvolt-speed3 = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-supported-hw = <0x0a>;
};
};
};
&cpu0 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu1 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu2 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu3 {
operating-points-v2 = <&cpu_opp_table>;
};

5
arch/arm/dts/sun50i-h616-orangepi-zero2.dts
View file

@ -6,12 +6,17 @@
/dts-v1/;
#include "sun50i-h616-orangepi-zero.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
/ {
model = "OrangePi Zero2";
compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
};
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
&emac0 {
allwinner,rx-delay-ps = <3100>;
allwinner,tx-delay-ps = <700>;

5
arch/arm/dts/sun50i-h616-x96-mate.dts
View file

@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -32,6 +33,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
&ehci0 {
status = "okay";
};

19
arch/arm/dts/sun50i-h616.dtsi
View file

@ -26,6 +26,7 @@
reg = <0>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@ -34,6 +35,7 @@
reg = <1>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
@ -42,6 +44,7 @@
reg = <2>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
@ -50,6 +53,7 @@
reg = <3>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
#cooling-cells = <2>;
};
};
@ -156,6 +160,10 @@
ths_calibration: thermal-sensor-calibration@14 {
reg = <0x14 0x8>;
};
cpu_speed_grade: cpu-speed-grade@0 {
reg = <0x0 2>;
};
};
watchdog: watchdog@30090a0 {
@ -194,7 +202,7 @@
};
i2c0_pins: i2c0-pins {
pins = "PI6", "PI7";
pins = "PI5", "PI6";
function = "i2c0";
};
@ -775,6 +783,15 @@
#reset-cells = <1>;
};
nmi_intc: interrupt-controller@7010320 {
compatible = "allwinner,sun50i-h616-nmi",
"allwinner,sun9i-a80-nmi";
reg = <0x07010320 0xc>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
};
r_pio: pinctrl@7022000 {
compatible = "allwinner,sun50i-h616-r-pinctrl";
reg = <0x07022000 0x400>;

5
arch/arm/dts/sun50i-h618-longan-module-3h.dtsi
View file

@ -4,6 +4,11 @@
*/
#include "sun50i-h616.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&mmc2 {
pinctrl-names = "default";

5
arch/arm/dts/sun50i-h618-orangepi-zero2w.dts
View file

@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -53,6 +54,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&ehci1 {
status = "okay";
};

5
arch/arm/dts/sun50i-h618-orangepi-zero3.dts
View file

@ -6,12 +6,17 @@
/dts-v1/;
#include "sun50i-h616-orangepi-zero.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
/ {
model = "OrangePi Zero3";
compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&emac0 {
allwinner,tx-delay-ps = <700>;
phy-mode = "rgmii-rxid";

7
arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts
View file

@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -41,7 +42,7 @@
regulator-always-on;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
@ -51,6 +52,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&ehci0 {
status = "okay";
};

2
arch/arm/dts/sun50i-h64-remix-mini-pc.dts
View file

@ -42,7 +42,7 @@
regulator-always-on;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
post-power-on-delay-ms = <200>;

327
arch/arm/dts/sun50i-h700-anbernic-rg35xx-2024.dts Normal file
View file

@ -0,0 +1,327 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>.
*/
/dts-v1/;
#include "sun50i-h616.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Anbernic RG35XX 2024";
chassis-type = "handset";
compatible = "anbernic,rg35xx-2024", "allwinner,sun50i-h700";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio_keys_gamepad: gpio-keys-gamepad {
compatible = "gpio-keys";
button-a {
label = "Action-Pad A";
gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_EAST>;
};
button-b {
label = "Action-Pad B";
gpios = <&pio 0 1 GPIO_ACTIVE_LOW>; /* PA1 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_SOUTH>;
};
button-down {
label = "D-Pad Down";
gpios = <&pio 4 0 GPIO_ACTIVE_LOW>; /* PE0 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_DPAD_DOWN>;
};
button-l1 {
label = "Key L1";
gpios = <&pio 0 10 GPIO_ACTIVE_LOW>; /* PA10 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_TL>;
};
button-l2 {
label = "Key L2";
gpios = <&pio 0 11 GPIO_ACTIVE_LOW>; /* PA11 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_TL2>;
};
button-left {
label = "D-Pad left";
gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_DPAD_LEFT>;
};
button-menu {
label = "Key Menu";
gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_MODE>;
};
button-r1 {
label = "Key R1";
gpios = <&pio 0 12 GPIO_ACTIVE_LOW>; /* PA12 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_TR>;
};
button-r2 {
label = "Key R2";
gpios = <&pio 0 7 GPIO_ACTIVE_LOW>; /* PA7 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_TR2>;
};
button-right {
label = "D-Pad Right";
gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_DPAD_RIGHT>;
};
button-select {
label = "Key Select";
gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; /* PA5 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_SELECT>;
};
button-start {
label = "Key Start";
gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_START>;
};
button-up {
label = "D-Pad Up";
gpios = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_DPAD_UP>;
};
button-x {
label = "Action-Pad X";
gpios = <&pio 0 3 GPIO_ACTIVE_LOW>; /* PA3 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_NORTH>;
};
button-y {
label = "Action Pad Y";
gpios = <&pio 0 2 GPIO_ACTIVE_LOW>; /* PA2 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_WEST>;
};
};
gpio-keys-volume {
compatible = "gpio-keys";
autorepeat;
button-vol-up {
label = "Key Volume Up";
gpios = <&pio 4 1 GPIO_ACTIVE_LOW>; /* PE1 */
linux,input-type = <EV_KEY>;
linux,code = <KEY_VOLUMEUP>;
};
button-vol-down {
label = "Key Volume Down";
gpios = <&pio 4 2 GPIO_ACTIVE_LOW>; /* PE2 */
linux,input-type = <EV_KEY>;
linux,code = <KEY_VOLUMEDOWN>;
};
};
leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 8 12 GPIO_ACTIVE_HIGH>; /* PI12 */
default-state = "on";
};
};
reg_vcc5v: regulator-vcc5v { /* USB-C power input */
compatible = "regulator-fixed";
regulator-name = "vcc-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
&cpu0 {
cpu-supply = <&reg_dcdc1>;
};
&ehci0 {
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_cldo3>;
disable-wp;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
bus-width = <4>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&pio {
vcc-pa-supply = <&reg_cldo3>;
vcc-pc-supply = <&reg_cldo3>;
vcc-pe-supply = <&reg_cldo3>;
vcc-pf-supply = <&reg_cldo3>;
vcc-pg-supply = <&reg_aldo4>;
vcc-ph-supply = <&reg_cldo3>;
vcc-pi-supply = <&reg_cldo3>;
};
&r_rsb {
status = "okay";
axp717: pmic@3a3 {
compatible = "x-powers,axp717";
reg = <0x3a3>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
vin1-supply = <&reg_vcc5v>;
vin2-supply = <&reg_vcc5v>;
vin3-supply = <&reg_vcc5v>;
vin4-supply = <&reg_vcc5v>;
regulators {
reg_dcdc1: dcdc1 {
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpu";
};
reg_dcdc2: dcdc2 {
regulator-always-on;
regulator-min-microvolt = <940000>;
regulator-max-microvolt = <940000>;
regulator-name = "vdd-gpu-sys";
};
reg_dcdc3: dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-dram";
};
reg_aldo1: aldo1 {
/* 1.8v - unused */
};
reg_aldo2: aldo2 {
/* 1.8v - unused */
};
reg_aldo3: aldo3 {
/* 1.8v - unused */
};
reg_aldo4: aldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-pg";
};
reg_bldo1: bldo1 {
/* 1.8v - unused */
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-pll";
};
reg_bldo3: bldo3 {
/* 2.8v - unused */
};
reg_bldo4: bldo4 {
/* 1.2v - unused */
};
reg_cldo1: cldo1 {
/* 3.3v - audio codec - not yet implemented */
};
reg_cldo2: cldo2 {
/* 3.3v - unused */
};
reg_cldo3: cldo3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-io";
};
reg_cldo4: cldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
reg_boost: boost {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5200000>;
regulator-name = "boost";
};
reg_cpusldo: cpusldo {
/* unused */
};
};
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
/* the AXP717 has USB type-C role switch functionality, not yet described by the binding */
&usbotg {
dr_mode = "peripheral"; /* USB type-C receptable */
status = "okay";
};
&usbphy {
status = "okay";
};

36
arch/arm/dts/sun50i-h700-anbernic-rg35xx-h.dts Normal file
View file

@ -0,0 +1,36 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>.
* Copyright (C) 2024 Chris Morgan <macroalpha82@gmail.com>.
*/
#include "sun50i-h700-anbernic-rg35xx-plus.dts"
/ {
model = "Anbernic RG35XX H";
compatible = "anbernic,rg35xx-h", "allwinner,sun50i-h700";
};
&gpio_keys_gamepad {
button-thumbl {
label = "GPIO Thumb Left";
gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_THUMBL>;
};
button-thumbr {
label = "GPIO Thumb Right";
gpios = <&pio 4 9 GPIO_ACTIVE_LOW>; /* PE9 */
linux,input-type = <EV_KEY>;
linux,code = <BTN_THUMBR>;
};
};
&ehci1 {
status = "okay";
};
&ohci1 {
status = "okay";
};

53
arch/arm/dts/sun50i-h700-anbernic-rg35xx-plus.dts Normal file
View file

@ -0,0 +1,53 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>.
*/
#include "sun50i-h700-anbernic-rg35xx-2024.dts"
/ {
model = "Anbernic RG35XX Plus";
compatible = "anbernic,rg35xx-plus", "allwinner,sun50i-h700";
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
pinctrl-0 = <&x32clk_fanout_pin>;
pinctrl-names = "default";
post-power-on-delay-ms = <200>;
reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
};
};
/* SDIO WiFi RTL8821CS */
&mmc1 {
vmmc-supply = <&reg_cldo4>;
vqmmc-supply = <&reg_aldo4>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
sdio_wifi: wifi@1 {
reg = <1>;
interrupt-parent = <&pio>;
interrupts = <6 15 IRQ_TYPE_LEVEL_LOW>; /* PG15 */
interrupt-names = "host-wake";
};
};
/* Bluetooth RTL8821CS */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt";
device-wake-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>; /* PG17 */
enable-gpios = <&pio 6 19 GPIO_ACTIVE_HIGH>; /* PG19 */
host-wake-gpios = <&pio 6 16 GPIO_ACTIVE_HIGH>; /* PG16 */
};
};

4
arch/arm/dts/sun5i-a13.dtsi
View file

@ -62,14 +62,14 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;

2
arch/arm/dts/sun5i-gr8-chip-pro.dts
View file

@ -77,7 +77,7 @@
};
};
mmc0_pwrseq: mmc0_pwrseq {
mmc0_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
};

2
arch/arm/dts/sun5i-r8-chip.dts
View file

@ -77,7 +77,7 @@
};
};
mmc0_pwrseq: mmc0_pwrseq {
mmc0_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
};

4
arch/arm/dts/sun6i-a31-hummingbird.dts
View file

@ -109,7 +109,7 @@
};
};
reg_vga_3v3: vga_3v3_regulator {
reg_vga_3v3: vga-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "vga-3v3";
regulator-min-microvolt = <3300000>;
@ -119,7 +119,7 @@
gpio = <&pio 7 25 GPIO_ACTIVE_HIGH>; /* PH25 */
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */
};

16
arch/arm/dts/sun6i-a31.dtsi
View file

@ -179,14 +179,14 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;
@ -1315,7 +1315,7 @@
compatible = "allwinner,sun6i-a31-prcm";
reg = <0x01f01400 0x200>;
ar100: ar100_clk {
ar100: ar100-clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
clocks = <&rtc CLK_OSC32K>, <&osc24M>,
@ -1324,7 +1324,7 @@
clock-output-names = "ar100";
};
ahb0: ahb0_clk {
ahb0: ahb0-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@ -1333,14 +1333,14 @@
clock-output-names = "ahb0";
};
apb0: apb0_clk {
apb0: apb0-clk {
compatible = "allwinner,sun6i-a31-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
apb0_gates: apb0_gates_clk {
apb0_gates: apb0-gates-clk {
compatible = "allwinner,sun6i-a31-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
@ -1350,14 +1350,14 @@
"apb0_i2c";
};
ir_clk: ir_clk {
ir_clk: ir-clk {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
clocks = <&rtc CLK_OSC32K>, <&osc24M>;
clock-output-names = "ir";
};
apb0_rst: apb0_rst {
apb0_rst: apb0-rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};

2
arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
View file

@ -75,7 +75,7 @@
};
};
mmc2_pwrseq: mmc2_pwrseq {
mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 WIFI_EN */
};

2
arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
View file

@ -86,7 +86,7 @@
};
};
mmc3_pwrseq: mmc3_pwrseq {
mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */
};

2
arch/arm/dts/sun7i-a20-cubietruck.dts
View file

@ -96,7 +96,7 @@
};
};
mmc3_pwrseq: mmc3_pwrseq {
mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
clocks = <&ccu CLK_OUT_A>;

4
arch/arm/dts/sun7i-a20-hummingbird.dts
View file

@ -65,7 +65,7 @@
stdout-path = "serial0:115200n8";
};
reg_mmc3_vdd: mmc3_vdd {
reg_mmc3_vdd: regulator-mmc3-vdd {
compatible = "regulator-fixed";
regulator-name = "mmc3_vdd";
regulator-min-microvolt = <3000000>;
@ -74,7 +74,7 @@
gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
};
reg_gmac_vdd: gmac_vdd {
reg_gmac_vdd: regulator-gmac-vdd {
compatible = "regulator-fixed";
regulator-name = "gmac_vdd";
regulator-min-microvolt = <3000000>;

2
arch/arm/dts/sun7i-a20-olimex-som-evb-emmc.dts
View file

@ -14,7 +14,7 @@
model = "Olimex A20-Olimex-SOM-EVB-eMMC";
compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
mmc2_pwrseq: mmc2_pwrseq {
mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
};

2
arch/arm/dts/sun7i-a20-olimex-som204-evb-emmc.dts
View file

@ -13,7 +13,7 @@
model = "Olimex A20-SOM204-EVB-eMMC";
compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20";
mmc2_pwrseq: mmc2_pwrseq {
mmc2_pwrseq: pwrseq-1 {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
};

4
arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
View file

@ -65,7 +65,7 @@
};
};
rtl_pwrseq: rtl_pwrseq {
rtl_pwrseq: pwrseq-0 {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>;
};
@ -177,7 +177,7 @@
non-removable;
status = "okay";
rtl8723bs: sdio_wifi@1 {
rtl8723bs: wifi@1 {
reg = <1>;
};
};

2
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
View file

@ -82,7 +82,7 @@
};
};
reg_axp_ipsout: axp_ipsout {
reg_axp_ipsout: regulator-axp-ipsout {
compatible = "regulator-fixed";
regulator-name = "axp-ipsout";
regulator-min-microvolt = <5000000>;

2
arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
View file

@ -60,7 +60,7 @@
stdout-path = "serial0:115200n8";
};
mmc3_pwrseq: mmc3_pwrseq {
mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
};

4
arch/arm/dts/sun7i-a20.dtsi
View file

@ -153,14 +153,14 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;

14
arch/arm/dts/sun8i-a23-a33.dtsi
View file

@ -108,7 +108,7 @@
#size-cells = <1>;
ranges;
osc24M: osc24M_clk {
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@ -116,7 +116,7 @@
clock-output-names = "osc24M";
};
ext_osc32k: ext_osc32k_clk {
ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
@ -730,7 +730,7 @@
compatible = "allwinner,sun8i-a23-prcm";
reg = <0x01f01400 0x200>;
ar100: ar100_clk {
ar100: ar100-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@ -739,7 +739,7 @@
clock-output-names = "ar100";
};
ahb0: ahb0_clk {
ahb0: ahb0-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@ -748,14 +748,14 @@
clock-output-names = "ahb0";
};
apb0: apb0_clk {
apb0: apb0-clk {
compatible = "allwinner,sun8i-a23-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
apb0_gates: apb0_gates_clk {
apb0_gates: apb0-gates-clk {
compatible = "allwinner,sun8i-a23-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
@ -764,7 +764,7 @@
"apb0_i2c";
};
apb0_rst: apb0_rst {
apb0_rst: apb0-rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};

4
arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
View file

@ -52,7 +52,7 @@
ethernet0 = &esp8089;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
/* The esp8089 needs 200 ms after driving wifi-en high */
@ -76,7 +76,7 @@
non-removable;
status = "okay";
esp8089: sdio_wifi@1 {
esp8089: wifi@1 {
compatible = "esp,esp8089";
reg = <1>;
esp,crystal-26M-en = <2>;

4
arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
View file

@ -52,7 +52,7 @@
ethernet0 = &esp8089;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
/* The esp8089 needs 200 ms after driving wifi-en high */
@ -69,7 +69,7 @@
non-removable;
status = "okay";
esp8089: sdio_wifi@1 {
esp8089: wifi@1 {
compatible = "esp,esp8089";
reg = <1>;
esp,crystal-26M-en = <2>;

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