johpow01 ef934cd17c fix(errata): workaround for Cortex-A710 2282622 ... Cortex-A710 erratum 2282622 is a Cat B erratum that applies to revisions r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to set CPUACTLR2_EL1[0] to 1, which will force PLDW/PFRM ST to behave like PLD/PRFM LD and not cause invalidations to other PE caches. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ic48409822536e9eacc003300036a1f0489593020		2022-03-09 00:04:02 +01:00
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alt-boot-flows.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
auth-framework.rst	Cleanup the code for TBBR CoT descriptors	2020-05-19 05:05:19 +01:00
cpu-specific-build-macros.rst	fix(errata): workaround for Cortex-A710 2282622	2022-03-09 00:04:02 +01:00
firmware-design.rst	docs(rme): add description of TF-A changes for RME	2021-11-15 22:20:07 +01:00
index.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
interrupt-framework-design.rst	Fix broken links to various sections across docs	2020-08-03 09:55:04 -05:00
psci-pd-tree.rst	doc: Set correct syntax highlighting style	2019-05-22 11:28:17 +01:00
reset-design.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
trusted-board-boot-build.rst	Mention COT build option in trusted-board-boot-build.rst	2020-03-12 17:11:26 +01:00
trusted-board-boot.rst	fix: remove "experimental" tag for stable features	2021-10-22 10:49:20 +01:00