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fix(errata): workaround for Cortex-A710 2282622

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Cortex-A710 erratum 2282622 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to set
CPUACTLR2_EL1[0] to 1, which will force PLDW/PFRM ST to behave like
PLD/PRFM LD and not cause invalidations to other PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ic48409822536e9eacc003300036a1f0489593020
This commit is contained in:
johpow01 2022-02-28 18:34:04 -06:00 • committed by John Powell
parent a82f5bbf9e
commit ef934cd17c
4 changed files with 54 additions and 1 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -417,6 +417,10 @@ For Cortex-A710, the following errata build flags are defined :
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
of the CPU and is fixed in r2p1.
- ``ERRATA_A710_2282622``: This applies errata 2282622 workaround to
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
of the CPU and is fixed in r2p1.
For Neoverse N2, the following errata build flags are defined :
- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2

7
include/lib/cpus/aarch64/cortex_a710.h
View file

@ -29,7 +29,12 @@
#define CORTEX_A710_CPUACTLR_EL1_BIT_22 (ULL(1) << 22)
/*******************************************************************************
* CPU Auxiliary Control register specific definitions.
* CPU Auxiliary Control register 2 specific definitions.
******************************************************************************/
#define CORTEX_A710_CPUACTLR2_EL1 S3_0_C15_C1_1
/*******************************************************************************
* CPU Auxiliary Control register 5 specific definitions.
******************************************************************************/
#define CORTEX_A710_CPUACTLR5_EL1 S3_0_C15_C8_0
#define CORTEX_A710_CPUACTLR5_EL1_BIT_13 (ULL(1) << 13)

36
lib/cpus/aarch64/cortex_a710.S
View file

@ -275,6 +275,36 @@ func check_errata_2136059
b cpu_rev_var_ls
endfunc check_errata_2136059
/* ---------------------------------------------------------------
* Errata Workaround for Cortex-A710 Erratum 2282622.
* This applies to revision r0p0, r1p0 and r2p0.
* It is fixed in r2p1.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0, x1, x17
* ---------------------------------------------------------------
*/
func errata_a710_2282622_wa
/* Compare x0 against revision r2p0 */
mov x17, x30
bl check_errata_2282622
cbz x0, 1f
/* Apply the workaround */
mrs x1, CORTEX_A710_CPUACTLR2_EL1
orr x1, x1, BIT(0)
msr CORTEX_A710_CPUACTLR2_EL1, x1
1:
ret x17
endfunc errata_a710_2282622_wa
func check_errata_2282622
/* Applies to r0p0, r1p0 and r2p0 */
mov x1, #0x20
b cpu_rev_var_ls
endfunc check_errata_2282622
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
* ----------------------------------------------------
@ -313,6 +343,7 @@ func cortex_a710_errata_report
report_errata ERRATA_A710_2058056, cortex_a710, 2058056
report_errata ERRATA_A710_2267065, cortex_a710, 2267065
report_errata ERRATA_A710_2136059, cortex_a710, 2136059
report_errata ERRATA_A710_2282622, cortex_a710, 2282622
ldp x8, x30, [sp], #16
ret
@ -368,6 +399,11 @@ func cortex_a710_reset_func
bl errata_a710_2136059_wa
#endif
#if ERRATA_A710_2282622
mov x0, x18
bl errata_a710_2282622_wa
#endif
isb
ret x19
endfunc cortex_a710_reset_func

8
lib/cpus/cpu-ops.mk
View file

@ -467,6 +467,10 @@ ERRATA_A710_2267065 ?=0
# to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is fixed in r2p1.
ERRATA_A710_2136059 ?=0
# Flag to apply erratum 2282622 workaround during reset. This erratum applies
# to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is fixed in r2p1.
ERRATA_A710_2282622 ?=0
# Flag to apply erratum 2067956 workaround during reset. This erratum applies
# to revision r0p0 of the Neoverse N2 cpu and is still open.
ERRATA_N2_2067956 ?=0
@ -957,6 +961,10 @@ $(eval $(call add_define,ERRATA_A710_2267065))
$(eval $(call assert_boolean,ERRATA_A710_2136059))
$(eval $(call add_define,ERRATA_A710_2136059))
# Process ERRATA_A710_2282622 flag
$(eval $(call assert_boolean,ERRATA_A710_2282622))
$(eval $(call add_define,ERRATA_A710_2282622))
# Process ERRATA_N2_2067956 flag
$(eval $(call assert_boolean,ERRATA_N2_2067956))
$(eval $(call add_define,ERRATA_N2_2067956))